ia64/xen-unstable

changeset 320:e27bfabd1b5a

bitkeeper revision 1.140 (3e746e649qRG4zMj_6-1prPYQZwRrw)

sanity check for long APIC ISR
author rn@wyvis.research.intel-research.net
date Sun Mar 16 12:30:28 2003 +0000 (2003-03-16)
parents e081ed2ebcd0
children 497998a019d8 fb9fb3949b4c
files xen/arch/i386/apic.c
line diff
     1.1 --- a/xen/arch/i386/apic.c	Sun Mar 16 12:05:26 2003 +0000
     1.2 +++ b/xen/arch/i386/apic.c	Sun Mar 16 12:30:28 2003 +0000
     1.3 @@ -46,6 +46,8 @@
     1.4  #include <asm/pgalloc.h>
     1.5  #include <asm/hardirq.h>
     1.6  #include <asm/apic.h>
     1.7 +
     1.8 +#include <asm/timex.h>
     1.9  #include <xeno/ac_timer.h>
    1.10  #include <xeno/perfc.h>
    1.11  
    1.12 @@ -746,6 +748,8 @@ unsigned int apic_timer_irqs [NR_CPUS];
    1.13  void smp_apic_timer_interrupt(struct pt_regs * regs)
    1.14  {
    1.15      int cpu = smp_processor_id();
    1.16 +    u32 cc_start, cc_end;
    1.17 +    rdtscl(cc_start);
    1.18  
    1.19      /*
    1.20       * the NMI deadlock-detector uses this.
    1.21 @@ -766,6 +770,10 @@ void smp_apic_timer_interrupt(struct pt_
    1.22  
    1.23      if (softirq_pending(cpu))
    1.24          do_softirq();
    1.25 +
    1.26 +    rdtscl(cc_end);
    1.27 +    if ( (cc_end - cc_start) > (cpu_khz * 100) )
    1.28 +        printk("APIC Long ISR on CPU=%02d %08X -> %08X\n",cpu,cc_start,cc_end);
    1.29  }
    1.30  
    1.31  /*