ia64/xen-unstable
changeset 13215:a138fabc2120
[HVM][VMX] Fix regs set/get decoding in VMXAssist.
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
author | kaf24@localhost.localdomain |
---|---|
date | Thu Dec 28 17:09:34 2006 +0000 (2006-12-28) |
parents | 615109616bb6 |
children | ede2f5280810 |
files | tools/firmware/vmxassist/vm86.c |
line diff
1.1 --- a/tools/firmware/vmxassist/vm86.c Thu Dec 28 15:54:15 2006 +0000 1.2 +++ b/tools/firmware/vmxassist/vm86.c Thu Dec 28 17:09:34 2006 +0000 1.3 @@ -297,7 +297,7 @@ getreg32(struct regs *regs, int r) 1.4 case 1: return regs->ecx; 1.5 case 2: return regs->edx; 1.6 case 3: return regs->ebx; 1.7 - case 4: return regs->esp; 1.8 + case 4: return regs->uesp; 1.9 case 5: return regs->ebp; 1.10 case 6: return regs->esi; 1.11 case 7: return regs->edi; 1.12 @@ -319,10 +319,10 @@ getreg8(struct regs *regs, int r) 1.13 case 1: return regs->ecx & 0xFF; /* cl */ 1.14 case 2: return regs->edx & 0xFF; /* dl */ 1.15 case 3: return regs->ebx & 0xFF; /* bl */ 1.16 - case 4: return (regs->esp >> 8) & 0xFF; /* ah */ 1.17 - case 5: return (regs->ebp >> 8) & 0xFF; /* ch */ 1.18 - case 6: return (regs->esi >> 8) & 0xFF; /* dh */ 1.19 - case 7: return (regs->edi >> 8) & 0xFF; /* bh */ 1.20 + case 4: return (regs->eax >> 8) & 0xFF; /* ah */ 1.21 + case 5: return (regs->ecx >> 8) & 0xFF; /* ch */ 1.22 + case 6: return (regs->edx >> 8) & 0xFF; /* dh */ 1.23 + case 7: return (regs->ebx >> 8) & 0xFF; /* bh */ 1.24 } 1.25 return ~0; 1.26 } 1.27 @@ -335,7 +335,7 @@ setreg32(struct regs *regs, int r, unsig 1.28 case 1: regs->ecx = v; break; 1.29 case 2: regs->edx = v; break; 1.30 case 3: regs->ebx = v; break; 1.31 - case 4: regs->esp = v; break; 1.32 + case 4: regs->uesp = v; break; 1.33 case 5: regs->ebp = v; break; 1.34 case 6: regs->esi = v; break; 1.35 case 7: regs->edi = v; break; 1.36 @@ -357,10 +357,10 @@ setreg8(struct regs *regs, int r, unsign 1.37 case 1: regs->ecx = (regs->ecx & ~0xFF) | v; break; 1.38 case 2: regs->edx = (regs->edx & ~0xFF) | v; break; 1.39 case 3: regs->ebx = (regs->ebx & ~0xFF) | v; break; 1.40 - case 4: regs->esp = (regs->esp & ~0xFF00) | (v << 8); break; 1.41 - case 5: regs->ebp = (regs->ebp & ~0xFF00) | (v << 8); break; 1.42 - case 6: regs->esi = (regs->esi & ~0xFF00) | (v << 8); break; 1.43 - case 7: regs->edi = (regs->edi & ~0xFF00) | (v << 8); break; 1.44 + case 4: regs->eax = (regs->eax & ~0xFF00) | (v << 8); break; 1.45 + case 5: regs->ecx = (regs->ecx & ~0xFF00) | (v << 8); break; 1.46 + case 6: regs->edx = (regs->edx & ~0xFF00) | (v << 8); break; 1.47 + case 7: regs->ebx = (regs->ebx & ~0xFF00) | (v << 8); break; 1.48 } 1.49 } 1.50