ia64/xen-unstable

changeset 17660:86587698116d

x86: Make MSI-X work with 64-bit BARs

The code for working out the base address of a 64-bit BAR currently
puts the two halves together in the wrong order and leaves the type
bits in the resulting value. It also treats
PCI_BASE_ADDRESS_MEM_TYPE_64 as a flag rather than an enumeration
value.

Signed-off-by: Neil Turton <nturton@solarflare.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed May 14 14:12:53 2008 +0100 (2008-05-14)
parents c9ec94410137
children c96507e0c83d 9044705960cb
files xen/arch/x86/msi.c
line diff
     1.1 --- a/xen/arch/x86/msi.c	Wed May 14 13:55:26 2008 +0100
     1.2 +++ b/xen/arch/x86/msi.c	Wed May 14 14:12:53 2008 +0100
     1.3 @@ -521,17 +521,20 @@ static int msi_capability_init(struct pc
     1.4  static u64 pci_resource_start(struct pci_dev *dev, u8 bar_index)
     1.5  {
     1.6      u64 bar_base;
     1.7 +    u32 reg_val;
     1.8      u8 bus = dev->bus;
     1.9      u8 slot = PCI_SLOT(dev->devfn);
    1.10      u8 func = PCI_FUNC(dev->devfn);
    1.11  
    1.12 -    bar_base = pci_conf_read32(bus, slot, func,
    1.13 -                               PCI_BASE_ADDRESS_0 + 4 * bar_index);
    1.14 -    if ( bar_base & PCI_BASE_ADDRESS_MEM_TYPE_64 )
    1.15 +    reg_val = pci_conf_read32(bus, slot, func,
    1.16 +                              PCI_BASE_ADDRESS_0 + 4 * bar_index);
    1.17 +    bar_base = reg_val & PCI_BASE_ADDRESS_MEM_MASK;
    1.18 +    if ( ( reg_val & PCI_BASE_ADDRESS_MEM_TYPE_MASK ) ==
    1.19 +         PCI_BASE_ADDRESS_MEM_TYPE_64 )
    1.20      {
    1.21 -        bar_base <<= 32;
    1.22 -        bar_base += pci_conf_read32(bus, slot, func,
    1.23 -                               PCI_BASE_ADDRESS_0 + 4 * (bar_index + 1));
    1.24 +        reg_val = pci_conf_read32(bus, slot, func,
    1.25 +                                  PCI_BASE_ADDRESS_0 + 4 * (bar_index + 1));
    1.26 +        bar_base |= ((u64)reg_val) << 32;
    1.27      }
    1.28  
    1.29      return bar_base;