ia64/xen-unstable

changeset 17314:7f04cbf2fa52

[IA64] Cleanup: TLB translation

Add a new static inline function for readability.

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
author Alex Williamson <alex.williamson@hp.com>
date Fri Mar 28 15:25:14 2008 -0600 (2008-03-28)
parents edfb58ca4d96
children 6827df3f7391
files xen/arch/ia64/vmx/vmmu.c xen/arch/ia64/vmx/vmx_fault.c xen/include/asm-ia64/vmmu.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmmu.c	Tue Mar 25 12:37:17 2008 -0600
     1.2 +++ b/xen/arch/ia64/vmx/vmmu.c	Fri Mar 28 15:25:14 2008 -0600
     1.3 @@ -167,7 +167,7 @@ fetch_code(VCPU *vcpu, u64 gip, IA64_BUN
     1.4  //        if( tlb == NULL )
     1.5  //             tlb = vtlb_lookup(vcpu, gip, DSIDE_TLB );
     1.6          if (tlb)
     1.7 -            gpip = (tlb->ppn >>(tlb->ps-12)<<tlb->ps) | ( gip & (PSIZE(tlb->ps)-1) );
     1.8 +            gpip = thash_translate(tlb, gip);
     1.9      }
    1.10      if( gpip){
    1.11          mfn = gmfn_to_mfn(vcpu->domain, gpip >>PAGE_SHIFT);
    1.12 @@ -180,8 +180,7 @@ fetch_code(VCPU *vcpu, u64 gip, IA64_BUN
    1.13              ia64_ptcl(gip, ARCH_PAGE_SHIFT << 2);
    1.14              return IA64_RETRY;
    1.15          }
    1.16 -        maddr = (tlb->ppn >> (tlb->ps - 12) << tlb->ps) |
    1.17 -                (gip & (PSIZE(tlb->ps) - 1));
    1.18 +        maddr = thash_translate(tlb, gip);
    1.19          mfn = maddr >> PAGE_SHIFT;
    1.20      }
    1.21  
    1.22 @@ -536,8 +535,7 @@ IA64FAULT vmx_vcpu_tpa(VCPU *vcpu, u64 v
    1.23              dnat_page_consumption(vcpu, vadr);
    1.24              return IA64_FAULT;
    1.25          } else {
    1.26 -            *padr = ((data->ppn >> (data->ps - 12)) << data->ps) |
    1.27 -                    (vadr & (PSIZE(data->ps) - 1));
    1.28 +            *padr = thash_translate(data, vadr);
    1.29              return IA64_NO_FAULT;
    1.30          }
    1.31      }
    1.32 @@ -554,8 +552,7 @@ IA64FAULT vmx_vcpu_tpa(VCPU *vcpu, u64 v
    1.33              dnat_page_consumption(vcpu, vadr);
    1.34              return IA64_FAULT;
    1.35          } else {
    1.36 -            madr = (data->ppn >> (data->ps - 12) << data->ps) |
    1.37 -                   (vadr & (PSIZE(data->ps) - 1));
    1.38 +            madr = thash_translate(data, vadr);
    1.39              *padr = __mpa_to_gpa(madr);
    1.40              return IA64_NO_FAULT;
    1.41          }
     2.1 --- a/xen/arch/ia64/vmx/vmx_fault.c	Tue Mar 25 12:37:17 2008 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vmx_fault.c	Fri Mar 28 15:25:14 2008 -0600
     2.3 @@ -402,8 +402,7 @@ try_again:
     2.4                  if ((data->ma == VA_MATTR_UC) || (data->ma == VA_MATTR_UCE))
     2.5                      return vmx_handle_lds(regs);
     2.6              }
     2.7 -            gppa = (vadr & ((1UL << data->ps) - 1)) +
     2.8 -                   (data->ppn >> (data->ps - 12) << data->ps);
     2.9 +            gppa = thash_translate(data, vadr);
    2.10              pte = lookup_domain_mpa(v->domain, gppa, NULL);
    2.11              if (pte & GPFN_IO_MASK) {
    2.12                  if (misr.sp)
     3.1 --- a/xen/include/asm-ia64/vmmu.h	Tue Mar 25 12:37:17 2008 -0600
     3.2 +++ b/xen/include/asm-ia64/vmmu.h	Fri Mar 28 15:25:14 2008 -0600
     3.3 @@ -118,6 +118,11 @@ typedef struct thash_data {
     3.4  #define INVALID_TR(hdata)      (!(hdata)->p)
     3.5  #define INVALID_ENTRY(hcb, hdata)       INVALID_VHPT(hdata)
     3.6  
     3.7 +static inline u64 thash_translate(thash_data_t *hdata, u64 vadr)
     3.8 +{
     3.9 +    int ps = hdata->ps;
    3.10 +    return (hdata->ppn >> (ps - 12) << ps) | (vadr & ((1UL << ps) - 1));
    3.11 +}
    3.12  
    3.13  typedef struct thash_cb {
    3.14      /* THASH base information */