1.1 --- a/xen/arch/x86/boot/x86_32.S	Tue Nov 13 19:05:27 2007 +0000
     1.2 +++ b/xen/arch/x86/boot/x86_32.S	Tue Nov 13 19:21:00 2007 +0000
     1.3 @@ -80,6 +80,16 @@ gdt_descr:
     1.4          .word   LAST_RESERVED_GDT_BYTE
     1.5          .long   gdt_table - FIRST_RESERVED_GDT_BYTE
     1.6  
     1.7 +
     1.8 +#ifdef CONFIG_X86_PAE
     1.9 +        .align 32
    1.10 +ENTRY(idle_pg_table)
    1.11 +        .long sym_phys(idle_pg_table_l2) + 0*PAGE_SIZE + 0x01, 0
    1.12 +        .long sym_phys(idle_pg_table_l2) + 1*PAGE_SIZE + 0x01, 0
    1.13 +        .long sym_phys(idle_pg_table_l2) + 2*PAGE_SIZE + 0x01, 0
    1.14 +        .long sym_phys(idle_pg_table_l2) + 3*PAGE_SIZE + 0x01, 0
    1.15 +#endif
    1.16 +
    1.17          .align PAGE_SIZE, 0
    1.18  /* NB. Rings != 0 get access up to MACH2PHYS_VIRT_END. This allows access to */
    1.19  /*     the machine->physical mapping table. Ring 0 can access all memory.    */
    1.20 @@ -94,14 +104,4 @@ ENTRY(gdt_table)
    1.21          GUEST_DESC(0x00c0b200)       /* 0xe021 ring 1 3.xxGB data at 0x0 */
    1.22          GUEST_DESC(0x00c0fa00)       /* 0xe02b ring 3 3.xxGB code at 0x0 */
    1.23          GUEST_DESC(0x00c0f200)       /* 0xe033 ring 3 3.xxGB data at 0x0 */
    1.24 -        .quad 0x0000000000000000     /* unused                           */
    1.25 -        .fill 2*NR_CPUS,8,0          /* space for TSS and LDT per CPU    */
    1.26 -
    1.27 -#ifdef CONFIG_X86_PAE
    1.28 -        .align 32
    1.29 -ENTRY(idle_pg_table)
    1.30 -        .long sym_phys(idle_pg_table_l2) + 0*PAGE_SIZE + 0x01, 0
    1.31 -        .long sym_phys(idle_pg_table_l2) + 1*PAGE_SIZE + 0x01, 0
    1.32 -        .long sym_phys(idle_pg_table_l2) + 2*PAGE_SIZE + 0x01, 0
    1.33 -        .long sym_phys(idle_pg_table_l2) + 3*PAGE_SIZE + 0x01, 0
    1.34 -#endif
    1.35 +        .align PAGE_SIZE,0

     2.1 --- a/xen/arch/x86/boot/x86_64.S	Tue Nov 13 19:05:27 2007 +0000
     2.2 +++ b/xen/arch/x86/boot/x86_64.S	Tue Nov 13 19:21:00 2007 +0000
     2.3 @@ -105,8 +105,6 @@ ENTRY(gdt_table)
     2.4          .quad 0x00cff2000000ffff     /* 0xe02b ring 3 data                */
     2.5          .quad 0x00affa000000ffff     /* 0xe033 ring 3 code, 64-bit mode   */
     2.6          .quad 0x00cf9a000000ffff     /* 0xe038 ring 0 code, compatibility */
     2.7 -        .org gdt_table - FIRST_RESERVED_GDT_BYTE + __TSS(0) * 8
     2.8 -        .fill 4*NR_CPUS,8,0          /* space for TSS and LDT per CPU     */
     2.9  
    2.10          .align PAGE_SIZE, 0
    2.11  /* NB. Even rings != 0 get access to the full 4Gb, as only the            */
    2.12 @@ -120,5 +118,4 @@ ENTRY(compat_gdt_table)
    2.13          .quad 0x00cffa000000ffff     /* 0xe02b ring 3 code, compatibility */
    2.14          .quad 0x00cff2000000ffff     /* 0xe033 ring 3 data                */
    2.15          .quad 0x00cf9a000000ffff     /* 0xe038 ring 0 code, compatibility */
    2.16 -        .org compat_gdt_table - FIRST_RESERVED_GDT_BYTE + __TSS(0) * 8
    2.17 -        .fill 4*NR_CPUS,8,0          /* space for TSS and LDT per CPU     */
    2.18 +        .align PAGE_SIZE, 0