ia64/xen-unstable

changeset 17316:408fcc50fd35

[IA64] Use ppn to store io type.

Instead of using 3 extra bits in pte to store the io type, only one bit
is used to mark the page as an IO page and the type is stored in the ppn
field. This both save 2 bits and allow many more io types.

Move the VTi memory map to arch-ia64/hvm/memmap.h

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author Alex Williamson <alex.williamson@hp.com>
date Tue Apr 01 09:42:52 2008 -0600 (2008-04-01)
parents 6827df3f7391
children e5244d14486c
files xen/arch/ia64/vmx/mmio.c xen/arch/ia64/vmx/sioemu.c xen/arch/ia64/vmx/vlsapic.c xen/arch/ia64/vmx/vmmu.c xen/arch/ia64/vmx/vmx_fault.c xen/arch/ia64/vmx/vmx_init.c xen/arch/ia64/vmx/vtlb.c xen/arch/ia64/xen/mm.c xen/include/asm-ia64/linux-xen/asm/pgtable.h xen/include/asm-ia64/vmmu.h xen/include/public/arch-ia64.h xen/include/public/arch-ia64/hvm/memmap.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/mmio.c	Fri Mar 28 15:27:13 2008 -0600
     1.2 +++ b/xen/arch/ia64/vmx/mmio.c	Tue Apr 01 09:42:52 2008 -0600
     1.3 @@ -39,6 +39,7 @@
     1.4  #include <asm/hvm/vacpi.h>
     1.5  #include <asm/hvm/support.h>
     1.6  #include <public/hvm/save.h>
     1.7 +#include <public/arch-ia64/hvm/memmap.h>
     1.8  #include <public/arch-ia64/sioemu.h>
     1.9  #include <asm/sioemu.h>
    1.10  
    1.11 @@ -352,11 +353,9 @@ static void legacy_io_access(VCPU *vcpu,
    1.12      return;
    1.13  }
    1.14  
    1.15 -static void mmio_access(VCPU *vcpu, u64 src_pa, u64 *dest, size_t s, int ma, int dir, u64 pte)
    1.16 +static void mmio_access(VCPU *vcpu, u64 src_pa, u64 *dest, size_t s, int ma, int dir, u64 iot)
    1.17  {
    1.18 -    unsigned long iot = pte & GPFN_IO_MASK;
    1.19 -
    1.20 -    perfc_incra(vmx_mmio_access, iot >> 56);
    1.21 +    perfc_incra(vmx_mmio_access, iot & 0x7);
    1.22      switch (iot) {
    1.23      case GPFN_PIB:       
    1.24          if (ma != 4)
    1.25 @@ -367,8 +366,6 @@ static void mmio_access(VCPU *vcpu, u64 
    1.26          else
    1.27              *dest = vlsapic_read(vcpu, src_pa, s);
    1.28          break;
    1.29 -    case GPFN_GFW:
    1.30 -        break;
    1.31      case GPFN_IOSAPIC:
    1.32          if (!dir)
    1.33              viosapic_write(vcpu, src_pa, s, *dest);
    1.34 @@ -394,7 +391,7 @@ enum inst_type_en { SL_INTEGER, SL_FLOAT
    1.35  /*
    1.36     dir 1: read 0:write
    1.37   */
    1.38 -void emulate_io_inst(VCPU *vcpu, u64 padr, u64 ma, u64 pte)
    1.39 +void emulate_io_inst(VCPU *vcpu, u64 padr, u64 ma, u64 iot)
    1.40  {
    1.41      REGS *regs;
    1.42      IA64_BUNDLE bundle;
    1.43 @@ -536,8 +533,6 @@ void emulate_io_inst(VCPU *vcpu, u64 pad
    1.44      }
    1.45  
    1.46      if (vcpu->domain->arch.is_sioemu) {
    1.47 -        unsigned long iot = pte & GPFN_IO_MASK;
    1.48 -
    1.49          if (iot != GPFN_PIB && iot != GPFN_IOSAPIC) {
    1.50              sioemu_io_emulate(padr, data, data1, update_word);
    1.51              return;
    1.52 @@ -545,10 +540,10 @@ void emulate_io_inst(VCPU *vcpu, u64 pad
    1.53      }
    1.54  
    1.55      if (size == 4) {
    1.56 -        mmio_access(vcpu, padr + 8, &data1, 1 << 3, ma, dir, pte);
    1.57 +        mmio_access(vcpu, padr + 8, &data1, 1 << 3, ma, dir, iot);
    1.58          size = 3;
    1.59      }
    1.60 -    mmio_access(vcpu, padr, &data, 1 << size, ma, dir, pte);
    1.61 +    mmio_access(vcpu, padr, &data, 1 << size, ma, dir, iot);
    1.62  
    1.63      emulate_io_update(vcpu, update_word, data, data1);
    1.64  }
     2.1 --- a/xen/arch/ia64/vmx/sioemu.c	Fri Mar 28 15:27:13 2008 -0600
     2.2 +++ b/xen/arch/ia64/vmx/sioemu.c	Tue Apr 01 09:42:52 2008 -0600
     2.3 @@ -166,8 +166,11 @@ sioemu_add_io_physmap (struct domain *d,
     2.4      unsigned long i;
     2.5      int res;
     2.6  
     2.7 +    /* Convert to ppn.  */
     2.8 +    type <<= PAGE_SHIFT;
     2.9 +
    2.10      /* Check type.  */
    2.11 -    if (type == 0 || (type & GPFN_IO_MASK) != type)
    2.12 +    if (type == 0 || (type & _PAGE_PPN_MASK) != type)
    2.13          return -EINVAL;
    2.14      if ((start & (PAGE_SIZE -1)) || (size & (PAGE_SIZE - 1)))
    2.15          return -EINVAL;
    2.16 @@ -180,7 +183,7 @@ sioemu_add_io_physmap (struct domain *d,
    2.17  
    2.18      /* Set.  */
    2.19      for (i = start; i < start + size; i += PAGE_SIZE) {
    2.20 -        res = __assign_domain_page(d, i, type, ASSIGN_writable);
    2.21 +        res = __assign_domain_page(d, i, type, ASSIGN_writable | ASSIGN_io);
    2.22          if (res != 0)
    2.23              return res;
    2.24      }
     3.1 --- a/xen/arch/ia64/vmx/vlsapic.c	Fri Mar 28 15:27:13 2008 -0600
     3.2 +++ b/xen/arch/ia64/vmx/vlsapic.c	Tue Apr 01 09:42:52 2008 -0600
     3.3 @@ -47,6 +47,7 @@
     3.4  #include <xen/domain.h>
     3.5  #include <asm/hvm/support.h>
     3.6  #include <public/hvm/save.h>
     3.7 +#include <public/arch-ia64/hvm/memmap.h>
     3.8  
     3.9  #ifdef IPI_DEBUG
    3.10  #define IPI_DPRINTK(x...) printk(x)
     4.1 --- a/xen/arch/ia64/vmx/vmmu.c	Fri Mar 28 15:27:13 2008 -0600
     4.2 +++ b/xen/arch/ia64/vmx/vmmu.c	Tue Apr 01 09:42:52 2008 -0600
     4.3 @@ -314,7 +314,7 @@ IA64FAULT vmx_vcpu_itr_d(VCPU *vcpu, u64
     4.4          thash_purge_entries(vcpu, va, ps);
     4.5      gpfn = (pte & _PAGE_PPN_MASK)>> PAGE_SHIFT;
     4.6      gpte = lookup_domain_mpa(vcpu->domain, gpfn, NULL);
     4.7 -    if (gpte & GPFN_IO_MASK)
     4.8 +    if (gpte & _PAGE_IO)
     4.9          pte |= VTLB_PTE_IO;
    4.10      vcpu_get_rr(vcpu, va, &rid);
    4.11      rid &= RR_RID_MASK;
     5.1 --- a/xen/arch/ia64/vmx/vmx_fault.c	Fri Mar 28 15:27:13 2008 -0600
     5.2 +++ b/xen/arch/ia64/vmx/vmx_fault.c	Tue Apr 01 09:42:52 2008 -0600
     5.3 @@ -372,8 +372,9 @@ vmx_hpw_miss(u64 vadr, u64 vec, REGS* re
     5.4                      return IA64_FAULT;
     5.5                  }
     5.6                  pte = lookup_domain_mpa(v->domain, pa_clear_uc(vadr), NULL);
     5.7 -                if (v->domain != dom0 && (pte & GPFN_IO_MASK)) {
     5.8 -                    emulate_io_inst(v, pa_clear_uc(vadr), 4, pte);
     5.9 +                if (v->domain != dom0 && (pte & _PAGE_IO)) {
    5.10 +                    emulate_io_inst(v, pa_clear_uc(vadr), 4,
    5.11 +                                    (pte & _PFN_MASK) >> PAGE_SHIFT);
    5.12                      return IA64_FAULT;
    5.13                  }
    5.14                  physical_tlb_miss(v, vadr, type);
    5.15 @@ -404,12 +405,13 @@ try_again:
    5.16              }
    5.17              gppa = thash_translate(data, vadr);
    5.18              pte = lookup_domain_mpa(v->domain, gppa, NULL);
    5.19 -            if (pte & GPFN_IO_MASK) {
    5.20 +            if (pte & _PAGE_IO) {
    5.21                  if (misr.sp)
    5.22                      panic_domain(NULL, "ld.s on I/O page not with UC attr."
    5.23                                   " pte=0x%lx\n", data->page_flags);
    5.24                  if (data->pl >= ((regs->cr_ipsr >> IA64_PSR_CPL0_BIT) & 3))
    5.25 -                    emulate_io_inst(v, gppa, data->ma, pte);
    5.26 +                    emulate_io_inst(v, gppa, data->ma, 
    5.27 +                                    (pte & _PFN_MASK) >> PAGE_SHIFT);
    5.28                  else {
    5.29                      vcpu_set_isr(v, misr.val);
    5.30                      data_access_rights(v, vadr);
     6.1 --- a/xen/arch/ia64/vmx/vmx_init.c	Fri Mar 28 15:27:13 2008 -0600
     6.2 +++ b/xen/arch/ia64/vmx/vmx_init.c	Tue Apr 01 09:42:52 2008 -0600
     6.3 @@ -44,6 +44,7 @@
     6.4  #include <public/xen.h>
     6.5  #include <public/hvm/ioreq.h>
     6.6  #include <public/event_channel.h>
     6.7 +#include <public/arch-ia64/hvm/memmap.h>
     6.8  #include <asm/vmx_phy_mode.h>
     6.9  #include <asm/processor.h>
    6.10  #include <asm/vmx.h>
    6.11 @@ -553,11 +554,11 @@ typedef struct io_range {
    6.12  } io_range_t;
    6.13  
    6.14  static const io_range_t io_ranges[] = {
    6.15 -	{VGA_IO_START, VGA_IO_SIZE, GPFN_FRAME_BUFFER},
    6.16 -	{MMIO_START, MMIO_SIZE, GPFN_LOW_MMIO},
    6.17 -	{LEGACY_IO_START, LEGACY_IO_SIZE, GPFN_LEGACY_IO},
    6.18 -	{IO_SAPIC_START, IO_SAPIC_SIZE, GPFN_IOSAPIC},
    6.19 -	{PIB_START, PIB_SIZE, GPFN_PIB},
    6.20 +	{VGA_IO_START, VGA_IO_SIZE, GPFN_FRAME_BUFFER << PAGE_SHIFT},
    6.21 +	{MMIO_START, MMIO_SIZE, GPFN_LOW_MMIO << PAGE_SHIFT},
    6.22 +	{LEGACY_IO_START, LEGACY_IO_SIZE, GPFN_LEGACY_IO << PAGE_SHIFT},
    6.23 +	{IO_SAPIC_START, IO_SAPIC_SIZE, GPFN_IOSAPIC << PAGE_SHIFT},
    6.24 +	{PIB_START, PIB_SIZE, GPFN_PIB << PAGE_SHIFT},
    6.25  };
    6.26  
    6.27  // The P2M table is built in libxc/ia64/xc_ia64_hvm_build.c @ setup_guest()
    6.28 @@ -571,7 +572,7 @@ static void vmx_build_io_physmap_table(s
    6.29  		for (j = io_ranges[i].start;
    6.30  		     j < io_ranges[i].start + io_ranges[i].size; j += PAGE_SIZE)
    6.31  			(void)__assign_domain_page(d, j, io_ranges[i].type,
    6.32 -			                           ASSIGN_writable);
    6.33 +			                           ASSIGN_writable | ASSIGN_io);
    6.34  	}
    6.35  
    6.36  }
     7.1 --- a/xen/arch/ia64/vmx/vtlb.c	Fri Mar 28 15:27:13 2008 -0600
     7.2 +++ b/xen/arch/ia64/vmx/vtlb.c	Tue Apr 01 09:42:52 2008 -0600
     7.3 @@ -515,7 +515,7 @@ static u64 translate_phy_pte(VCPU *v, u6
     7.4      phy_pte.val = pte;
     7.5      paddr = ((pte & _PAGE_PPN_MASK) & ps_mask) | (va & ~ps_mask);
     7.6      maddr = lookup_domain_mpa(d, paddr, NULL);
     7.7 -    if (maddr & GPFN_IO_MASK)
     7.8 +    if (maddr & _PAGE_IO)
     7.9          return -1;
    7.10  
    7.11      /* Ensure WB attribute if pte is related to a normal mem page,
     8.1 --- a/xen/arch/ia64/xen/mm.c	Fri Mar 28 15:27:13 2008 -0600
     8.2 +++ b/xen/arch/ia64/xen/mm.c	Tue Apr 01 09:42:52 2008 -0600
     8.3 @@ -886,6 +886,7 @@ flags_to_prot (unsigned long flags)
     8.4      res |= flags & ASSIGN_tlb_track ? _PAGE_TLB_TRACKING: 0;
     8.5  #endif
     8.6      res |= flags & ASSIGN_pgc_allocated ? _PAGE_PGC_ALLOCATED: 0;
     8.7 +    res |= flags & ASSIGN_io ? _PAGE_IO: 0;
     8.8      
     8.9      return res;
    8.10  }
    8.11 @@ -966,7 +967,7 @@ assign_domain_page(struct domain *d,
    8.12  {
    8.13      struct page_info* page = mfn_to_page(physaddr >> PAGE_SHIFT);
    8.14  
    8.15 -    BUG_ON((physaddr & GPFN_IO_MASK) != GPFN_MEM);
    8.16 +    BUG_ON((physaddr & _PAGE_PPN_MASK) != physaddr);
    8.17      BUG_ON(page->count_info != (PGC_allocated | 1));
    8.18      set_gpfn_from_mfn(physaddr >> PAGE_SHIFT, mpaddr >> PAGE_SHIFT);
    8.19      // because __assign_domain_page() uses set_pte_rel() which has
     9.1 --- a/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Fri Mar 28 15:27:13 2008 -0600
     9.2 +++ b/xen/include/asm-ia64/linux-xen/asm/pgtable.h	Tue Apr 01 09:42:52 2008 -0600
     9.3 @@ -97,17 +97,9 @@
     9.4  
     9.5  #define _PAGE_PGC_ALLOCATED_BIT	59	/* _PGC_allocated */
     9.6  #define _PAGE_PGC_ALLOCATED	(__IA64_UL(1) << _PAGE_PGC_ALLOCATED_BIT)
     9.7 -/* domVTI */
     9.8 -#define GPFN_MEM		(0UL << 60)	/* Guest pfn is normal mem */
     9.9 -#define GPFN_FRAME_BUFFER	(1UL << 60)	/* VGA framebuffer */
    9.10 -#define GPFN_LOW_MMIO		(2UL << 60)	/* Low MMIO range */
    9.11 -#define GPFN_PIB		(3UL << 60)	/* PIB base */
    9.12 -#define GPFN_IOSAPIC		(4UL << 60)	/* IOSAPIC base */
    9.13 -#define GPFN_LEGACY_IO		(5UL << 60)	/* Legacy I/O base */
    9.14 -#define GPFN_GFW		(6UL << 60)	/* Guest Firmware */
    9.15 -#define GPFN_HIGH_MMIO		(7UL << 60)	/* High MMIO range */
    9.16  
    9.17 -#define GPFN_IO_MASK		(7UL << 60)	/* Guest pfn is I/O type */
    9.18 +#define _PAGE_IO_BIT		60
    9.19 +#define _PAGE_IO		(__IA64_UL(1) << _PAGE_IO_BIT)
    9.20  
    9.21  #else
    9.22  #define _PAGE_PROTNONE		(__IA64_UL(1) << 63)
    9.23 @@ -341,7 +333,7 @@ set_pte_rel(volatile pte_t* ptep, pte_t 
    9.24  #define pte_file(pte)		((pte_val(pte) & _PAGE_FILE) != 0)
    9.25  #ifdef XEN
    9.26  #define pte_pgc_allocated(pte)	((pte_val(pte) & _PAGE_PGC_ALLOCATED) != 0)
    9.27 -#define pte_mem(pte)	(!(pte_val(pte) & GPFN_IO_MASK) && !pte_none(pte))
    9.28 +#define pte_mem(pte)	(!(pte_val(pte) & _PAGE_IO) && !pte_none(pte))
    9.29  #endif
    9.30  /*
    9.31   * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the
    10.1 --- a/xen/include/asm-ia64/vmmu.h	Fri Mar 28 15:27:13 2008 -0600
    10.2 +++ b/xen/include/asm-ia64/vmmu.h	Tue Apr 01 09:42:52 2008 -0600
    10.3 @@ -190,7 +190,7 @@ extern int init_domain_tlb(struct vcpu *
    10.4  extern void free_domain_tlb(struct vcpu *v);
    10.5  extern thash_data_t * vhpt_lookup(u64 va);
    10.6  extern unsigned long fetch_code(struct vcpu *vcpu, u64 gip, IA64_BUNDLE *pbundle);
    10.7 -extern void emulate_io_inst(struct vcpu *vcpu, u64 padr, u64 ma, u64 pte);
    10.8 +extern void emulate_io_inst(struct vcpu *vcpu, u64 padr, u64 ma, u64 iot);
    10.9  extern void emulate_io_update(struct vcpu *vcpu, u64 word, u64 d, u64 d1);
   10.10  extern int vhpt_enabled(struct vcpu *vcpu, uint64_t vadr, vhpt_ref_t ref);
   10.11  extern void thash_vhpt_insert(struct vcpu *v, u64 pte, u64 itir, u64 ifa,
    11.1 --- a/xen/include/public/arch-ia64.h	Fri Mar 28 15:27:13 2008 -0600
    11.2 +++ b/xen/include/public/arch-ia64.h	Tue Apr 01 09:42:52 2008 -0600
    11.3 @@ -62,6 +62,10 @@ typedef unsigned long xen_pfn_t;
    11.4  /* WARNING: before changing this, check that shared_info fits on a page */
    11.5  #define MAX_VIRT_CPUS 64
    11.6  
    11.7 +/* IO ports location for PV.  */
    11.8 +#define IO_PORTS_PADDR          0x00000ffffc000000UL
    11.9 +#define IO_PORTS_SIZE           0x0000000004000000UL
   11.10 +
   11.11  #ifndef __ASSEMBLY__
   11.12  
   11.13  #define __anonymous_union __extension__ union
   11.14 @@ -76,54 +80,6 @@ typedef unsigned long xen_ulong_t;
   11.15  
   11.16  #define INVALID_MFN       (~0UL)
   11.17  
   11.18 -#define MEM_G   (1UL << 30)
   11.19 -#define MEM_M   (1UL << 20)
   11.20 -#define MEM_K   (1UL << 10)
   11.21 -
   11.22 -/* Guest physical address of IO ports space.  */
   11.23 -#define IO_PORTS_PADDR          0x00000ffffc000000UL
   11.24 -#define IO_PORTS_SIZE           0x0000000004000000UL
   11.25 -
   11.26 -#define MMIO_START       (3 * MEM_G)
   11.27 -#define MMIO_SIZE        (512 * MEM_M)
   11.28 -
   11.29 -#define VGA_IO_START     0xA0000UL
   11.30 -#define VGA_IO_SIZE      0x20000
   11.31 -
   11.32 -#define LEGACY_IO_START  (MMIO_START + MMIO_SIZE)
   11.33 -#define LEGACY_IO_SIZE   (64*MEM_M)
   11.34 -
   11.35 -#define IO_PAGE_START (LEGACY_IO_START + LEGACY_IO_SIZE)
   11.36 -#define IO_PAGE_SIZE  XEN_PAGE_SIZE
   11.37 -
   11.38 -#define STORE_PAGE_START (IO_PAGE_START + IO_PAGE_SIZE)
   11.39 -#define STORE_PAGE_SIZE  XEN_PAGE_SIZE
   11.40 -
   11.41 -#define BUFFER_IO_PAGE_START (STORE_PAGE_START + STORE_PAGE_SIZE)
   11.42 -#define BUFFER_IO_PAGE_SIZE  XEN_PAGE_SIZE
   11.43 -
   11.44 -#define BUFFER_PIO_PAGE_START (BUFFER_IO_PAGE_START + BUFFER_IO_PAGE_SIZE)
   11.45 -#define BUFFER_PIO_PAGE_SIZE  XEN_PAGE_SIZE
   11.46 -
   11.47 -#define IO_SAPIC_START   0xfec00000UL
   11.48 -#define IO_SAPIC_SIZE    0x100000
   11.49 -
   11.50 -#define PIB_START 0xfee00000UL
   11.51 -#define PIB_SIZE 0x200000
   11.52 -
   11.53 -#define GFW_START        (4*MEM_G -16*MEM_M)
   11.54 -#define GFW_SIZE         (16*MEM_M)
   11.55 -
   11.56 -/* Nvram belongs to GFW memory space  */
   11.57 -#define NVRAM_SIZE       (MEM_K * 64)
   11.58 -#define NVRAM_START      (GFW_START + 10 * MEM_M)
   11.59 -
   11.60 -#define NVRAM_VALID_SIG 0x4650494e45584948 		// "HIXENIPF"
   11.61 -struct nvram_save_addr {
   11.62 -    unsigned long addr;
   11.63 -    unsigned long signature;
   11.64 -};
   11.65 -
   11.66  struct pt_fpreg {
   11.67      union {
   11.68          unsigned long bits[2];
   11.69 @@ -505,6 +461,9 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_conte
   11.70  /* Internal only: associated with PGC_allocated bit */
   11.71  #define _ASSIGN_pgc_allocated           3
   11.72  #define ASSIGN_pgc_allocated            (1UL << _ASSIGN_pgc_allocated)
   11.73 +/* Page is an IO page.  */
   11.74 +#define _ASSIGN_io                      4
   11.75 +#define ASSIGN_io                       (1UL << _ASSIGN_io)
   11.76  
   11.77  /* This structure has the same layout of struct ia64_boot_param, defined in
   11.78     <asm/system.h>.  It is redefined here to ease use.  */
   11.79 @@ -640,6 +599,10 @@ DEFINE_XEN_GUEST_HANDLE(pfarg_load_t);
   11.80  #endif /* __ASSEMBLY__ */
   11.81  #endif /* XEN */
   11.82  
   11.83 +#ifndef __ASSEMBLY__
   11.84 +#include "arch-ia64/hvm/memmap.h"
   11.85 +#endif
   11.86 +
   11.87  #endif /* __HYPERVISOR_IF_IA64_H__ */
   11.88  
   11.89  /*
    12.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    12.2 +++ b/xen/include/public/arch-ia64/hvm/memmap.h	Tue Apr 01 09:42:52 2008 -0600
    12.3 @@ -0,0 +1,88 @@
    12.4 +/******************************************************************************
    12.5 + * memmap.h
    12.6 + *
    12.7 + * Copyright (c) 2008 Tristan Gingold <tgingold AT free fr>
    12.8 + *
    12.9 + * This program is free software; you can redistribute it and/or modify
   12.10 + * it under the terms of the GNU General Public License as published by
   12.11 + * the Free Software Foundation; either version 2 of the License, or
   12.12 + * (at your option) any later version.
   12.13 + *
   12.14 + * This program is distributed in the hope that it will be useful,
   12.15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
   12.16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   12.17 + * GNU General Public License for more details.
   12.18 + *
   12.19 + * You should have received a copy of the GNU General Public License
   12.20 + * along with this program; if not, write to the Free Software
   12.21 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
   12.22 + *
   12.23 + */
   12.24 +
   12.25 +#ifndef __XEN_PUBLIC_HVM_MEMMAP_IA64_H__
   12.26 +#define __XEN_PUBLIC_HVM_MEMMAP_IA64_H__
   12.27 +
   12.28 +#define MEM_G  (1UL << 30)
   12.29 +#define MEM_M  (1UL << 20)
   12.30 +#define MEM_K  (1UL << 10)
   12.31 +
   12.32 +/* Guest physical address of IO ports space.  */
   12.33 +#define MMIO_START  (3 * MEM_G)
   12.34 +#define MMIO_SIZE   (512 * MEM_M)
   12.35 +
   12.36 +#define VGA_IO_START  0xA0000UL
   12.37 +#define VGA_IO_SIZE   0x20000
   12.38 +
   12.39 +#define LEGACY_IO_START  (MMIO_START + MMIO_SIZE)
   12.40 +#define LEGACY_IO_SIZE   (64 * MEM_M)
   12.41 +
   12.42 +#define IO_PAGE_START  (LEGACY_IO_START + LEGACY_IO_SIZE)
   12.43 +#define IO_PAGE_SIZE   XEN_PAGE_SIZE
   12.44 +
   12.45 +#define STORE_PAGE_START  (IO_PAGE_START + IO_PAGE_SIZE)
   12.46 +#define STORE_PAGE_SIZE   XEN_PAGE_SIZE
   12.47 +
   12.48 +#define BUFFER_IO_PAGE_START  (STORE_PAGE_START + STORE_PAGE_SIZE)
   12.49 +#define BUFFER_IO_PAGE_SIZE   XEN_PAGE_SIZE
   12.50 +
   12.51 +#define BUFFER_PIO_PAGE_START  (BUFFER_IO_PAGE_START + BUFFER_IO_PAGE_SIZE)
   12.52 +#define BUFFER_PIO_PAGE_SIZE   XEN_PAGE_SIZE
   12.53 +
   12.54 +#define IO_SAPIC_START  0xfec00000UL
   12.55 +#define IO_SAPIC_SIZE   0x100000
   12.56 +
   12.57 +#define PIB_START  0xfee00000UL
   12.58 +#define PIB_SIZE   0x200000
   12.59 +
   12.60 +#define GFW_START  (4 * MEM_G - 16 * MEM_M)
   12.61 +#define GFW_SIZE   (16 * MEM_M)
   12.62 +
   12.63 +/* domVTI */
   12.64 +#define GPFN_FRAME_BUFFER  0x1 /* VGA framebuffer */
   12.65 +#define GPFN_LOW_MMIO      0x2 /* Low MMIO range */
   12.66 +#define GPFN_PIB           0x3 /* PIB base */
   12.67 +#define GPFN_IOSAPIC       0x4 /* IOSAPIC base */
   12.68 +#define GPFN_LEGACY_IO     0x5 /* Legacy I/O base */
   12.69 +#define GPFN_HIGH_MMIO     0x6 /* High MMIO range */
   12.70 +
   12.71 +/* Nvram belongs to GFW memory space  */
   12.72 +#define NVRAM_SIZE   (MEM_K * 64)
   12.73 +#define NVRAM_START  (GFW_START + 10 * MEM_M)
   12.74 +
   12.75 +#define NVRAM_VALID_SIG  0x4650494e45584948 /* "HIXENIPF" */
   12.76 +struct nvram_save_addr {
   12.77 +    unsigned long addr;
   12.78 +    unsigned long signature;
   12.79 +};
   12.80 +
   12.81 +#endif /* __XEN_PUBLIC_HVM_MEMMAP_IA64_H__ */
   12.82 +
   12.83 +/*
   12.84 + * Local variables:
   12.85 + * mode: C
   12.86 + * c-set-style: "BSD"
   12.87 + * c-basic-offset: 4
   12.88 + * tab-width: 4
   12.89 + * indent-tabs-mode: nil
   12.90 + * End:
   12.91 + */