ia64/xen-unstable

changeset 18501:3d96f88fb220

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[IA64] fix INIT injection.

xm trigger command sometimes causes an unexpected domain panic.
There are several symptoms:
* Guest nested fault (INIT handler runs with vpsr.cpl != 0)
* Interrupt when IC=0
* Unexpected virtual <--> physical mode transition

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
Signed-off-by: Kazuhiro Suzuki <kaz@jp.fujitsu.com>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Thu Sep 18 17:54:15 2008 +0900 (2008-09-18)
parents 4a381ddc764a
children 6055360dbfe4
files xen/arch/ia64/vmx/vlsapic.c xen/arch/ia64/vmx/vmx_phy_mode.c xen/include/asm-ia64/vmx_phy_mode.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vlsapic.c	Tue Sep 16 21:25:30 2008 +0900
     1.2 +++ b/xen/arch/ia64/vmx/vlsapic.c	Thu Sep 18 17:54:15 2008 +0900
     1.3 @@ -43,6 +43,7 @@
     1.4  #include <asm/vmx_platform.h>
     1.5  #include <asm/viosapic.h>
     1.6  #include <asm/vlsapic.h>
     1.7 +#include <asm/vmx_phy_mode.h>
     1.8  #include <asm/linux/jiffies.h>
     1.9  #include <xen/domain.h>
    1.10  #include <asm/hvm/support.h>
    1.11 @@ -614,9 +615,8 @@ struct vcpu *lid_to_vcpu(struct domain *
    1.12   * To inject INIT to guest, we must set the PAL_INIT entry 
    1.13   * and set psr to switch to physical mode
    1.14   */
    1.15 -#define PAL_INIT_ENTRY 0x80000000ffffffa0
    1.16  #define PSR_SET_BITS (IA64_PSR_DT | IA64_PSR_IT | IA64_PSR_RT | \
    1.17 -                      IA64_PSR_IC | IA64_PSR_RI)
    1.18 +                      IA64_PSR_IC | IA64_PSR_RI | IA64_PSR_I | IA64_PSR_CPL)
    1.19  
    1.20  static void vmx_inject_guest_pal_init(VCPU *vcpu)
    1.21  {

     2.1 --- a/xen/arch/ia64/vmx/vmx_phy_mode.c	Tue Sep 16 21:25:30 2008 +0900
     2.2 +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c	Thu Sep 18 17:54:15 2008 +0900
     2.3 @@ -255,7 +255,12 @@ void
     2.4  switch_mm_mode(VCPU *vcpu, IA64_PSR old_psr, IA64_PSR new_psr)
     2.5  {
     2.6      int act;
     2.7 -    act = mm_switch_action(old_psr, new_psr);
     2.8 +    /* Switch to physical mode when injecting PAL_INIT */
     2.9 +    if (unlikely(MODE_IND(new_psr) == 0 &&
    2.10 +                 vcpu_regs(vcpu)->cr_iip == PAL_INIT_ENTRY))
    2.11 +        act = SW_2P_DT;
    2.12 +    else
    2.13 +        act = mm_switch_action(old_psr, new_psr);
    2.14      perfc_incra(vmx_switch_mm_mode, act);
    2.15      switch (act) {
    2.16      case SW_2P_DT:

     3.1 --- a/xen/include/asm-ia64/vmx_phy_mode.h	Tue Sep 16 21:25:30 2008 +0900
     3.2 +++ b/xen/include/asm-ia64/vmx_phy_mode.h	Thu Sep 18 17:54:15 2008 +0900
     3.3 @@ -96,4 +96,6 @@ extern void physical_tlb_miss(VCPU *vcpu
     3.4  #define VMX_MMU_PHY_D      1    /* Half physical: it=1,dt=0  */
     3.5  #define VMX_MMU_PHY_DT     3    /* Full physical mode: it=0,dt=0  */
     3.6  
     3.7 +#define PAL_INIT_ENTRY 0x80000000ffffffa0
     3.8 +
     3.9  #endif /* _PHY_MODE_H_ */