ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/smp.h @ 8534:da7873110bbb

Tiny bootstrap cleanup.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Mon Jan 09 19:46:46 2006 +0100 (2006-01-09)
parents 3d27ee7da0c1
children
line source
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #ifndef __ASSEMBLY__
8 #include <linux/config.h>
9 #include <linux/threads.h>
10 #include <linux/cpumask.h>
11 #include <linux/bitops.h>
12 extern int disable_apic;
13 #endif
15 #ifdef CONFIG_X86_LOCAL_APIC
16 #ifndef __ASSEMBLY__
17 #include <asm/fixmap.h>
18 #include <asm/mpspec.h>
19 #ifdef CONFIG_X86_IO_APIC
20 #include <asm/io_apic.h>
21 #endif
22 #include <asm/apic.h>
23 #include <asm/thread_info.h>
24 #endif
25 #endif
27 #ifdef CONFIG_SMP
28 #ifndef ASSEMBLY
30 #include <asm/pda.h>
32 struct pt_regs;
34 extern cpumask_t cpu_present_mask;
35 extern cpumask_t cpu_possible_map;
36 extern cpumask_t cpu_online_map;
38 /*
39 * Private routines/data
40 */
42 extern void smp_alloc_memory(void);
43 extern volatile unsigned long smp_invalidate_needed;
44 extern int pic_mode;
45 extern int smp_num_siblings;
46 extern void smp_flush_tlb(void);
47 extern void smp_message_irq(int cpl, void *dev_id, struct pt_regs *regs);
48 extern void smp_send_reschedule(int cpu);
49 extern void smp_invalidate_rcv(void); /* Process an NMI */
50 extern void zap_low_mappings(void);
51 void smp_stop_cpu(void);
52 extern cpumask_t cpu_sibling_map[NR_CPUS];
53 extern cpumask_t cpu_core_map[NR_CPUS];
54 extern int phys_proc_id[NR_CPUS];
55 extern int cpu_core_id[NR_CPUS];
57 #define SMP_TRAMPOLINE_BASE 0x6000
59 /*
60 * On x86 all CPUs are mapped 1:1 to the APIC space.
61 * This simplifies scheduling and IPI sending and
62 * compresses data structures.
63 */
65 static inline int num_booting_cpus(void)
66 {
67 return cpus_weight(cpu_possible_map);
68 }
70 #define __smp_processor_id() read_pda(cpunumber)
72 #ifdef CONFIG_X86_LOCAL_APIC
73 extern __inline int hard_smp_processor_id(void)
74 {
75 /* we don't want to mark this access volatile - bad code generation */
76 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
77 }
78 #endif
80 extern int safe_smp_processor_id(void);
82 #endif /* !ASSEMBLY */
84 #define NO_PROC_ID 0xFF /* No processor magic marker */
86 #endif
88 #ifndef ASSEMBLY
89 /*
90 * Some lowlevel functions might want to know about
91 * the real APIC ID <-> CPU # mapping.
92 */
93 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
94 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
95 extern u8 bios_cpu_apicid[];
96 #ifdef CONFIG_X86_LOCAL_APIC
97 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
98 {
99 return cpus_addr(cpumask)[0];
100 }
102 static inline int cpu_present_to_apicid(int mps_cpu)
103 {
104 if (mps_cpu < NR_CPUS)
105 return (int)bios_cpu_apicid[mps_cpu];
106 else
107 return BAD_APICID;
108 }
109 #endif
111 #endif /* !ASSEMBLY */
113 #ifndef CONFIG_SMP
114 #define stack_smp_processor_id() 0
115 #define safe_smp_processor_id() 0
116 #define cpu_logical_map(x) (x)
117 #else
118 #include <asm/thread_info.h>
119 #define stack_smp_processor_id() \
120 ({ \
121 struct thread_info *ti; \
122 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
123 ti->cpu; \
124 })
125 #endif
127 #ifndef __ASSEMBLY__
128 #ifdef CONFIG_X86_LOCAL_APIC
129 static __inline int logical_smp_processor_id(void)
130 {
131 /* we don't want to mark this access volatile - bad code generation */
132 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
133 }
134 #endif
135 #endif
137 #endif