ia64/xen-unstable

view xen/include/asm-ia64/vcpu.h @ 5704:9b73afea874e

Certain types of event channel are now auto-bound to vcpu0 by Xen.
Make sure that xenolinux agrees with this.
author sos22@douglas.cl.cam.ac.uk
date Fri Jul 08 15:35:43 2005 +0000 (2005-07-08)
parents 649cd37aa1ab
children 0e7741276468 a83ac0806d6b
line source
1 #ifndef _XEN_IA64_VCPU_H
2 #define _XEN_IA64_VCPU_H
4 // TODO: Many (or perhaps most) of these should eventually be
5 // static inline functions
7 //#include "thread.h"
8 #include <asm/ia64_int.h>
10 typedef unsigned long UINT64;
11 typedef unsigned int UINT;
12 typedef int BOOLEAN;
13 struct vcpu;
14 typedef struct vcpu VCPU;
16 // NOTE: The actual VCPU structure (struct virtualcpu) is defined in
17 // thread.h. Moving it to here caused a lot of files to change, so
18 // for now, we'll leave well enough alone.
19 typedef struct pt_regs REGS;
20 //#define PSCB(vcpu) (((struct spk_thread_t *)vcpu)->pscb)
21 //#define vcpu_regs(vcpu) &((struct spk_thread_t *)vcpu)->thread_regs
22 //#define vcpu_thread(vcpu) ((struct spk_thread_t *)vcpu)
24 #define PRIVOP_ADDR_COUNT
25 #ifdef PRIVOP_ADDR_COUNT
26 #define _GET_IFA 0
27 #define _THASH 1
28 #define PRIVOP_COUNT_NINSTS 2
29 #define PRIVOP_COUNT_NADDRS 30
31 struct privop_addr_count {
32 char *instname;
33 unsigned long addr[PRIVOP_COUNT_NADDRS];
34 unsigned long count[PRIVOP_COUNT_NADDRS];
35 unsigned long overflow;
36 };
37 #endif
39 /* general registers */
40 extern UINT64 vcpu_get_gr(VCPU *vcpu, unsigned reg);
41 extern IA64FAULT vcpu_set_gr(VCPU *vcpu, unsigned reg, UINT64 value);
42 /* application registers */
43 extern IA64FAULT vcpu_set_ar(VCPU *vcpu, UINT64 reg, UINT64 val);
44 /* psr */
45 extern BOOLEAN vcpu_get_psr_ic(VCPU *vcpu);
46 extern UINT64 vcpu_get_ipsr_int_state(VCPU *vcpu,UINT64 prevpsr);
47 extern IA64FAULT vcpu_get_psr(VCPU *vcpu, UINT64 *pval);
48 extern IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, UINT64 imm);
49 extern IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UINT64 imm);
50 extern IA64FAULT vcpu_set_psr_l(VCPU *vcpu, UINT64 val);
51 /* control registers */
52 extern IA64FAULT vcpu_set_dcr(VCPU *vcpu, UINT64 val);
53 extern IA64FAULT vcpu_set_itm(VCPU *vcpu, UINT64 val);
54 extern IA64FAULT vcpu_set_iva(VCPU *vcpu, UINT64 val);
55 extern IA64FAULT vcpu_set_pta(VCPU *vcpu, UINT64 val);
56 extern IA64FAULT vcpu_set_ipsr(VCPU *vcpu, UINT64 val);
57 extern IA64FAULT vcpu_set_isr(VCPU *vcpu, UINT64 val);
58 extern IA64FAULT vcpu_set_iip(VCPU *vcpu, UINT64 val);
59 extern IA64FAULT vcpu_set_ifa(VCPU *vcpu, UINT64 val);
60 extern IA64FAULT vcpu_set_itir(VCPU *vcpu, UINT64 val);
61 extern IA64FAULT vcpu_set_iipa(VCPU *vcpu, UINT64 val);
62 extern IA64FAULT vcpu_set_ifs(VCPU *vcpu, UINT64 val);
63 extern IA64FAULT vcpu_set_iim(VCPU *vcpu, UINT64 val);
64 extern IA64FAULT vcpu_set_iha(VCPU *vcpu, UINT64 val);
65 extern IA64FAULT vcpu_set_lid(VCPU *vcpu, UINT64 val);
66 extern IA64FAULT vcpu_set_tpr(VCPU *vcpu, UINT64 val);
67 extern IA64FAULT vcpu_set_eoi(VCPU *vcpu, UINT64 val);
68 extern IA64FAULT vcpu_set_lrr0(VCPU *vcpu, UINT64 val);
69 extern IA64FAULT vcpu_set_lrr1(VCPU *vcpu, UINT64 val);
70 extern IA64FAULT vcpu_get_dcr(VCPU *vcpu, UINT64 *pval);
71 extern IA64FAULT vcpu_get_itm(VCPU *vcpu, UINT64 *pval);
72 extern IA64FAULT vcpu_get_iva(VCPU *vcpu, UINT64 *pval);
73 extern IA64FAULT vcpu_get_pta(VCPU *vcpu, UINT64 *pval);
74 extern IA64FAULT vcpu_get_ipsr(VCPU *vcpu, UINT64 *pval);
75 extern IA64FAULT vcpu_get_isr(VCPU *vcpu, UINT64 *pval);
76 extern IA64FAULT vcpu_get_iip(VCPU *vcpu, UINT64 *pval);
77 extern IA64FAULT vcpu_increment_iip(VCPU *vcpu);
78 extern IA64FAULT vcpu_get_ifa(VCPU *vcpu, UINT64 *pval);
79 extern IA64FAULT vcpu_get_itir(VCPU *vcpu, UINT64 *pval);
80 extern unsigned long vcpu_get_itir_on_fault(VCPU *vcpu, UINT64 ifa);
81 extern IA64FAULT vcpu_get_iipa(VCPU *vcpu, UINT64 *pval);
82 extern IA64FAULT vcpu_get_ifs(VCPU *vcpu, UINT64 *pval);
83 extern IA64FAULT vcpu_get_iim(VCPU *vcpu, UINT64 *pval);
84 extern IA64FAULT vcpu_get_iha(VCPU *vcpu, UINT64 *pval);
85 extern IA64FAULT vcpu_get_lid(VCPU *vcpu, UINT64 *pval);
86 extern IA64FAULT vcpu_get_tpr(VCPU *vcpu, UINT64 *pval);
87 extern IA64FAULT vcpu_get_irr0(VCPU *vcpu, UINT64 *pval);
88 extern IA64FAULT vcpu_get_irr1(VCPU *vcpu, UINT64 *pval);
89 extern IA64FAULT vcpu_get_irr2(VCPU *vcpu, UINT64 *pval);
90 extern IA64FAULT vcpu_get_irr3(VCPU *vcpu, UINT64 *pval);
91 extern IA64FAULT vcpu_get_lrr0(VCPU *vcpu, UINT64 *pval);
92 extern IA64FAULT vcpu_get_lrr1(VCPU *vcpu, UINT64 *pval);
93 /* interrupt registers */
94 extern IA64FAULT vcpu_get_itv(VCPU *vcpu,UINT64 *pval);
95 extern IA64FAULT vcpu_get_pmv(VCPU *vcpu,UINT64 *pval);
96 extern IA64FAULT vcpu_get_cmcv(VCPU *vcpu,UINT64 *pval);
97 extern IA64FAULT vcpu_get_ivr(VCPU *vcpu, UINT64 *pval);
98 extern IA64FAULT vcpu_set_itv(VCPU *vcpu, UINT64 val);
99 extern IA64FAULT vcpu_set_pmv(VCPU *vcpu, UINT64 val);
100 extern IA64FAULT vcpu_set_cmcv(VCPU *vcpu, UINT64 val);
101 /* interval timer registers */
102 extern IA64FAULT vcpu_set_itm(VCPU *vcpu,UINT64 val);
103 extern IA64FAULT vcpu_set_itc(VCPU *vcpu,UINT64 val);
104 /* debug breakpoint registers */
105 extern IA64FAULT vcpu_set_ibr(VCPU *vcpu,UINT64 reg,UINT64 val);
106 extern IA64FAULT vcpu_set_dbr(VCPU *vcpu,UINT64 reg,UINT64 val);
107 extern IA64FAULT vcpu_get_ibr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
108 extern IA64FAULT vcpu_get_dbr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
109 /* performance monitor registers */
110 extern IA64FAULT vcpu_set_pmc(VCPU *vcpu,UINT64 reg,UINT64 val);
111 extern IA64FAULT vcpu_set_pmd(VCPU *vcpu,UINT64 reg,UINT64 val);
112 extern IA64FAULT vcpu_get_pmc(VCPU *vcpu,UINT64 reg,UINT64 *pval);
113 extern IA64FAULT vcpu_get_pmd(VCPU *vcpu,UINT64 reg,UINT64 *pval);
114 /* banked general registers */
115 extern IA64FAULT vcpu_bsw0(VCPU *vcpu);
116 extern IA64FAULT vcpu_bsw1(VCPU *vcpu);
117 /* region registers */
118 extern IA64FAULT vcpu_set_rr(VCPU *vcpu,UINT64 reg,UINT64 val);
119 extern IA64FAULT vcpu_get_rr(VCPU *vcpu,UINT64 reg,UINT64 *pval);
120 extern IA64FAULT vcpu_get_rr_ve(VCPU *vcpu,UINT64 vadr);
121 /* protection key registers */
122 extern IA64FAULT vcpu_get_pkr(VCPU *vcpu, UINT64 reg, UINT64 *pval);
123 extern IA64FAULT vcpu_set_pkr(VCPU *vcpu, UINT64 reg, UINT64 val);
124 extern IA64FAULT vcpu_tak(VCPU *vcpu, UINT64 vadr, UINT64 *key);
125 /* TLB */
126 extern IA64FAULT vcpu_itr_d(VCPU *vcpu, UINT64 slot, UINT64 padr,
127 UINT64 itir, UINT64 ifa);
128 extern IA64FAULT vcpu_itr_i(VCPU *vcpu, UINT64 slot, UINT64 padr,
129 UINT64 itir, UINT64 ifa);
130 extern IA64FAULT vcpu_itc_d(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
131 extern IA64FAULT vcpu_itc_i(VCPU *vcpu, UINT64 padr, UINT64 itir, UINT64 ifa);
132 extern IA64FAULT vcpu_ptc_l(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
133 extern IA64FAULT vcpu_ptc_e(VCPU *vcpu, UINT64 vadr);
134 extern IA64FAULT vcpu_ptc_g(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
135 extern IA64FAULT vcpu_ptc_ga(VCPU *vcpu, UINT64 vadr, UINT64 addr_range);
136 extern IA64FAULT vcpu_ptr_d(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
137 extern IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 vadr, UINT64 addr_range);
138 extern IA64FAULT vcpu_tpa(VCPU *vcpu, UINT64 vadr, UINT64 *padr);
139 /* misc */
140 extern IA64FAULT vcpu_rfi(VCPU *vcpu);
141 extern IA64FAULT vcpu_thash(VCPU *vcpu, UINT64 vadr, UINT64 *pval);
143 extern void vcpu_pend_interrupt(VCPU *vcpu, UINT64 vector);
144 extern void vcpu_pend_timer(VCPU *vcpu);
145 extern void vcpu_poke_timer(VCPU *vcpu);
146 extern void vcpu_set_next_timer(VCPU *vcpu);
147 extern BOOLEAN vcpu_timer_expired(VCPU *vcpu);
148 extern UINT64 vcpu_deliverable_interrupts(VCPU *vcpu);
149 extern void vcpu_itc_no_srlz(VCPU *vcpu, UINT64, UINT64, UINT64, UINT64, UINT64);
150 extern UINT64 vcpu_get_tmp(VCPU *, UINT64);
151 extern void vcpu_set_tmp(VCPU *, UINT64, UINT64);
154 #endif