From 131aad10eda9b8cceb56a9c408f819ea8a29a573 Mon Sep 17 00:00:00 2001 From: Julien Grall Date: Wed, 14 May 2014 19:45:02 +0100 Subject: [PATCH 5/5] HACK: Enable evtchn and timer IRQ on secondary CPUs --- sys/arm/arm/gic.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index b5eed99..33159ba9 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -187,6 +187,8 @@ gic_init_secondary(void) gic_d_write_4(GICD_ISENABLER(27 >> 5), (1UL << (27 & 0x1F))); gic_d_write_4(GICD_ISENABLER(29 >> 5), (1UL << (29 & 0x1F))); gic_d_write_4(GICD_ISENABLER(30 >> 5), (1UL << (30 & 0x1F))); + /* Activate IRQ 31, ie private evtchn IRQ */ + gic_d_write_4(GICD_ISENABLER(31 >> 5), (1UL << (31 & 0x1F))); } int -- 2.1.0