From fa707af2d40f1b6fd24e3c19c47d6e70ee7b4678 Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Tue, 10 Jun 2014 15:07:19 +0100 Subject: [PATCH] xen/arm: introduce GIC_PRI_TO_GUEST macro GICH_LR registers and GICH_VMCR only support 5 bits for guest irq priorities. Introduce a macro to reduce the 8-bit priority fields to 5 bits; use it in gic.c. Signed-off-by: Stefano Stabellini Acked-by: Ian Campbell --- xen/arch/arm/gic.c | 2 +- xen/include/asm-arm/gic.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 88c2fd3a05..4d044cf0b7 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -561,7 +561,7 @@ static inline void gic_set_lr(int lr, struct pending_irq *p, BUG_ON(lr < 0); BUG_ON(state & ~(GICH_LR_STATE_MASK<priority >> 3) << GICH_LR_PRIORITY_SHIFT) | + lr_val = state | (GIC_PRI_TO_GUEST(p->priority) << GICH_LR_PRIORITY_SHIFT) | ((p->irq & GICH_LR_VIRTUAL_MASK) << GICH_LR_VIRTUAL_SHIFT); if ( p->desc != NULL ) lr_val |= GICH_LR_HW | (p->desc->irq << GICH_LR_PHYSICAL_SHIFT); diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 3c4d14e8b6..a14cd5e257 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -149,6 +149,8 @@ #define GIC_PRI_IRQ 0xa0 #define GIC_PRI_IPI 0x90 /* IPIs must preempt normal interrupts */ #define GIC_PRI_HIGHEST 0x80 /* Higher priorities belong to Secure-World */ +#define GIC_PRI_TO_GUEST(pri) (pri >> 3) /* GICH_LR and GICH_VMCR only support + 5 bits for guest irq priority */ #ifndef __ASSEMBLY__ -- 2.39.5