From f37d20015adbfd0b70a06ac0ccfa9edffaa0723f Mon Sep 17 00:00:00 2001 From: Ross Philipson Date: Sat, 28 Mar 2009 14:24:34 -0400 Subject: [PATCH] FLR - intermediate checkin 11 3/28 - disable gm45 igfx flr and check for a NULL parent bridge. Changes to be committed: modified: drivers/xen/pciback/pciback_ops.c --- drivers/xen/pciback/pciback_ops.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/xen/pciback/pciback_ops.c b/drivers/xen/pciback/pciback_ops.c index b9b5492e..87997534 100644 --- a/drivers/xen/pciback/pciback_ops.c +++ b/drivers/xen/pciback/pciback_ops.c @@ -23,6 +23,9 @@ int verbose_request = 0; module_param(verbose_request, int, 0644); +/* TODO remove once this is fixed */ +static int disable_gm45_igfx_flr = 1; + /* Used to store the config state so it can be restored after * resets. */ @@ -160,6 +163,9 @@ static int pciback_do_vendor_specific_reset(struct pci_dev *dev) return -ENXIO; if ((dev->class >> 8) == PCIBACK_CLASS_ID_VGA) { + if (disable_gm45_igfx_flr) + return -ENXIO; + if (dev->bus->number != 0 || dev->devfn != PCI_DEVFN(2,0)) return -ENXIO; @@ -274,6 +280,10 @@ static int pciback_do_secondary_bus_reset(struct pci_dev *dev) struct pci_dev *dev_arr[8]; int i = 0, err = 0; + if (!bridge) { + dev_dbg(&dev->dev, "No parent bridge to reset\n"); + return ENXIO; + } dev_dbg(&dev->dev, "doing PCIe secondary bus reset\n"); /* Enumerate all devices that share the same slot for the -- 2.39.5