From c6f3f334d157ff6b9bdc4e1b9d9874234138836a Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 26 Apr 2022 09:24:01 -0700 Subject: [PATCH] hw/xtensa: fix reset value of MIROUT register of MX PIC MX PIC comes out of reset with IRQ routing registers set to 0, thus not delivering any external IRQ to any connected CPU by default. Fix the model to match the hardware. Signed-off-by: Max Filippov --- hw/xtensa/mx_pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/xtensa/mx_pic.c b/hw/xtensa/mx_pic.c index d889f953d1..8211c993eb 100644 --- a/hw/xtensa/mx_pic.c +++ b/hw/xtensa/mx_pic.c @@ -334,7 +334,7 @@ void xtensa_mx_pic_reset(void *opaque) mx->miasg = 0; mx->mipipart = 0; for (i = 0; i < mx->n_irq; ++i) { - mx->mirout[i] = 1; + mx->mirout[i] = 0; } for (i = 0; i < mx->n_cpu; ++i) { mx->cpu[i].mipicause = 0; -- 2.39.5