From ba584fb1a26c058ebd0e6a2779287b3e4400415c Mon Sep 17 00:00:00 2001 From: =?utf8?q?Roger=20Pau=20Monn=C3=A9?= Date: Fri, 22 Jan 2021 12:13:05 +0100 Subject: [PATCH] x86/vioapic: check IRR before attempting to inject interrupt after EOI MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit In vioapic_update_EOI the irq_lock will be dropped in order to forward the EOI to the dpci handler, so there's a window between clearing IRR and checking if the line is asserted where IRR can change behind our back. Fix this by checking whether IRR is set before attempting to inject a new interrupt. Fixes: 06e3f8f2766 ('vt-d: Do dpci eoi outside of irq_lock.') Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- xen/arch/x86/hvm/vioapic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index eb6c143f74..804bc77279 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -526,7 +526,7 @@ void vioapic_update_EOI(struct domain *d, u8 vector) } if ( (ent->fields.trig_mode == VIOAPIC_LEVEL_TRIG) && - !ent->fields.mask && + !ent->fields.mask && !ent->fields.remote_irr && hvm_irq->gsi_assert_count[vioapic->base_gsi + pin] ) { ent->fields.remote_irr = 1; -- 2.39.5