From af292b41e9edc0a87f0205ece833e64808ec3883 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Wed, 7 Aug 2019 12:29:01 +0100 Subject: [PATCH] x86/boot: Set Accessed bits in boot_cpu_{,compat_}gdt_table[] There is no point causing the CPU to performed a locked update of the descriptors on first use. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/boot/x86_64.S | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S index cf47e019f5..0eaf9d2a07 100644 --- a/xen/arch/x86/boot/x86_64.S +++ b/xen/arch/x86/boot/x86_64.S @@ -55,13 +55,13 @@ GLOBAL(stack_start) .align PAGE_SIZE, 0 GLOBAL(boot_cpu_gdt_table) .quad 0x0000000000000000 /* unused */ - .quad 0x00af9a000000ffff /* 0xe008 ring 0 code, 64-bit mode */ - .quad 0x00cf92000000ffff /* 0xe010 ring 0 data */ + .quad 0x00af9b000000ffff /* 0xe008 ring 0 code, 64-bit mode */ + .quad 0x00cf93000000ffff /* 0xe010 ring 0 data */ .quad 0x0000000000000000 /* reserved */ - .quad 0x00cffa000000ffff /* 0xe023 ring 3 code, compatibility */ - .quad 0x00cff2000000ffff /* 0xe02b ring 3 data */ - .quad 0x00affa000000ffff /* 0xe033 ring 3 code, 64-bit mode */ - .quad 0x00cf9a000000ffff /* 0xe038 ring 0 code, compatibility */ + .quad 0x00cffb000000ffff /* 0xe023 ring 3 code, compatibility */ + .quad 0x00cff3000000ffff /* 0xe02b ring 3 data */ + .quad 0x00affb000000ffff /* 0xe033 ring 3 code, 64-bit mode */ + .quad 0x00cf9b000000ffff /* 0xe038 ring 0 code, compatibility */ .fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0 .quad 0x0000910000000000 /* per-CPU entry (limit == cpu) */ @@ -70,13 +70,13 @@ GLOBAL(boot_cpu_gdt_table) /* (compatibility) machine->physical mapping table lives there. */ GLOBAL(boot_cpu_compat_gdt_table) .quad 0x0000000000000000 /* unused */ - .quad 0x00af9a000000ffff /* 0xe008 ring 0 code, 64-bit mode */ - .quad 0x00cf92000000ffff /* 0xe010 ring 0 data */ - .quad 0x00cfba000000ffff /* 0xe019 ring 1 code, compatibility */ - .quad 0x00cfb2000000ffff /* 0xe021 ring 1 data */ - .quad 0x00cffa000000ffff /* 0xe02b ring 3 code, compatibility */ - .quad 0x00cff2000000ffff /* 0xe033 ring 3 data */ - .quad 0x00cf9a000000ffff /* 0xe038 ring 0 code, compatibility */ + .quad 0x00af9b000000ffff /* 0xe008 ring 0 code, 64-bit mode */ + .quad 0x00cf93000000ffff /* 0xe010 ring 0 data */ + .quad 0x00cfbb000000ffff /* 0xe019 ring 1 code, compatibility */ + .quad 0x00cfb3000000ffff /* 0xe021 ring 1 data */ + .quad 0x00cffb000000ffff /* 0xe02b ring 3 code, compatibility */ + .quad 0x00cff3000000ffff /* 0xe033 ring 3 data */ + .quad 0x00cf9b000000ffff /* 0xe038 ring 0 code, compatibility */ .fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0 .quad 0x0000910000000000 /* per-CPU entry (limit == cpu) */ .align PAGE_SIZE, 0 -- 2.39.5