From 83917016f87ca5feeb32f2fdcae32e560bb8d283 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Roger=20Pau=20Monn=C3=A9?= Date: Tue, 7 Jul 2020 15:42:15 +0200 Subject: [PATCH] vtd: don't assume addresses are aligned in sync_cache MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Current code in sync_cache assume that the address passed in is aligned to a cache line size. Fix the code to support passing in arbitrary addresses not necessarily aligned to a cache line size. This is part of XSA-321. Reported-by: Jan Beulich Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich master commit: b6d9398144f21718d25daaf8d72669a75592abc5 master date: 2020-07-07 14:39:05 +0200 --- xen/drivers/passthrough/vtd/iommu.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index 6b9a1b6145..2c6a69dfbe 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -161,8 +161,8 @@ static int iommus_incoherent; static void sync_cache(const void *addr, unsigned int size) { - int i; - static unsigned int clflush_size = 0; + static unsigned long clflush_size = 0; + const void *end = addr + size; if ( !iommus_incoherent ) return; @@ -170,8 +170,9 @@ static void sync_cache(const void *addr, unsigned int size) if ( clflush_size == 0 ) clflush_size = get_cache_line_size(); - for ( i = 0; i < size; i += clflush_size ) - cacheline_flush((char *)addr + i); + addr -= (unsigned long)addr & (clflush_size - 1); + for ( ; addr < end; addr += clflush_size ) + cacheline_flush((char *)addr); } /* Allocate page table, return its machine address */ -- 2.39.5