From 6d8c6dee3a767e7650e5d0640e13adb9f01fa37c Mon Sep 17 00:00:00 2001 From: Rakesh Jeyasingh Date: Mon, 7 Apr 2025 23:43:27 +0530 Subject: [PATCH] rust/hw/char/pl011: Extract DR write logic into separate function - Split `write()` DR case into `write_data_register()` Signed-off-by: Rakesh Jeyasingh Link: https://lore.kernel.org/r/20250407181327.171563-3-rakeshjb010@gmail.com Signed-off-by: Paolo Bonzini --- rust/hw/char/pl011/src/device.rs | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs index 87153cdae1..bb2a0f207a 100644 --- a/rust/hw/char/pl011/src/device.rs +++ b/rust/hw/char/pl011/src/device.rs @@ -221,12 +221,7 @@ impl PL011Registers { // eprintln!("write offset {offset} value {value}"); use RegisterOffset::*; match offset { - DR => { - // interrupts always checked - let _ = self.loopback_tx(value.into()); - self.int_level |= Interrupt::TX.0; - return true; - } + DR => return self.write_data_register(value), RSR => { self.receive_status_error_clear = 0.into(); } @@ -307,6 +302,13 @@ impl PL011Registers { u32::from(c) } + fn write_data_register(&mut self, value: u32) -> bool { + // interrupts always checked + let _ = self.loopback_tx(value.into()); + self.int_level |= Interrupt::TX.0; + true + } + #[inline] #[must_use] fn loopback_tx(&mut self, value: registers::Data) -> bool { -- 2.39.5