From 625f2cc66f53c7f1bf56562bf96c06510087d484 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Fri, 10 Feb 2023 21:22:37 +0000 Subject: [PATCH] x86/entry: Use 32bit XOR in handle_ist_exception This is a micro-optimsiation for Silvermont microarchitectures, which don't recognise the 64bit form as a zeroing idiom. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/x86_64/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index 9a7b129aa7..d95fc75b34 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -1027,7 +1027,7 @@ handle_ist_exception: * Interrupted guest context. Clear the restore value for xen_cr3 * and copy the context to stack bottom. */ - xor %r15, %r15 + xor %r15d, %r15d xor %ebx, %ebx GET_CPUINFO_FIELD(guest_cpu_user_regs,di) movq %rsp,%rsi -- 2.39.5