From 5feeebe41b8d4fd0f207e64a491e6e303c51f743 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Tue, 19 Jul 2016 13:38:01 +0100 Subject: [PATCH] Provide PTE_SIZE and PTE_ORDER appropriate for the in-use paging mode Signed-off-by: Andrew Cooper --- arch/x86/hvm/pagetables.S | 4 ++-- include/arch/x86/page-pae.h | 12 +++++++----- include/arch/x86/page-pse.h | 8 +++++--- include/arch/x86/page.h | 6 ++++++ 4 files changed, 20 insertions(+), 10 deletions(-) diff --git a/arch/x86/hvm/pagetables.S b/arch/x86/hvm/pagetables.S index a0d5431..ffb94dc 100644 --- a/arch/x86/hvm/pagetables.S +++ b/arch/x86/hvm/pagetables.S @@ -11,8 +11,8 @@ #define PAGE_COMMON _PAGE_DIRTY + _PAGE_ACCESSED + _PAGE_USER + _PAGE_RW + _PAGE_PRESENT -#define PAE_IDX(sym) ((. - (sym)) / PAE_PTE_SZ) -#define PSE_IDX(sym) ((. - (sym)) / PSE_PTE_SZ) +#define PAE_IDX(sym) ((. - (sym)) / PAE_PTE_SIZE) +#define PSE_IDX(sym) ((. - (sym)) / PSE_PTE_SIZE) .data .p2align PAGE_SHIFT diff --git a/include/arch/x86/page-pae.h b/include/arch/x86/page-pae.h index fcade43..2e3231c 100644 --- a/include/arch/x86/page-pae.h +++ b/include/arch/x86/page-pae.h @@ -7,17 +7,19 @@ #define XTF_X86_PAGE_PAE_H /** PAE pagetable entries are 64 bits wide. */ -#define PAE_PTE_SZ 8 +#define PAE_PTE_SIZE 8 +/** PAE pagetable entries are 64 bits wide. */ +#define PAE_PTE_ORDER 3 /** PAE pagetables encode 9 bits of index. */ #define PAE_PT_ORDER 9 /** @{ */ /** All PAE pagetables contain 512 entries. */ -#define PAE_L1_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SZ) -#define PAE_L2_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SZ) -#define PAE_L3_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SZ) -#define PAE_L4_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SZ) +#define PAE_L1_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SIZE) +#define PAE_L2_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SIZE) +#define PAE_L3_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SIZE) +#define PAE_L4_PT_ENTRIES (PAGE_SIZE / PAE_PTE_SIZE) /* Other than PAE32_L3, which has 4 entries. */ #define PAE32_L3_ENTRIES 4 diff --git a/include/arch/x86/page-pse.h b/include/arch/x86/page-pse.h index 517cdc7..0d233ed 100644 --- a/include/arch/x86/page-pse.h +++ b/include/arch/x86/page-pse.h @@ -7,15 +7,17 @@ #define XTF_X86_PAGE_PSE_H /** PSE pagetable entries are 32 bits wide. */ -#define PSE_PTE_SZ 4 +#define PSE_PTE_SIZE 4 +/** PSE pagetable entries are 32 bits wide. */ +#define PSE_PTE_ORDER 2 /** PAE pagetables encode 10 bits of index. */ #define PSE_PT_ORDER 10 /** @{ */ /** All PSE pagetables contain 1024 entries. */ -#define PSE_L1_PT_ENTRIES (PAGE_SIZE / PSE_PTE_SZ) -#define PSE_L2_PT_ENTRIES (PAGE_SIZE / PSE_PTE_SZ) +#define PSE_L1_PT_ENTRIES (PAGE_SIZE / PSE_PTE_SIZE) +#define PSE_L2_PT_ENTRIES (PAGE_SIZE / PSE_PTE_SIZE) /** @} */ #define PSE_L1_PT_SHIFT 12 diff --git a/include/arch/x86/page.h b/include/arch/x86/page.h index 95052c8..9241525 100644 --- a/include/arch/x86/page.h +++ b/include/arch/x86/page.h @@ -39,6 +39,9 @@ #if CONFIG_PAGING_LEVELS == 2 /* PSE Paging */ +#define PTE_SIZE PSE_PTE_SIZE +#define PTE_ORDER PSE_PTE_ORDER + #define PT_ORDER PSE_PT_ORDER #define L1_PT_SHIFT PSE_L1_PT_SHIFT @@ -49,6 +52,9 @@ #else /* CONFIG_PAGING_LEVELS == 2 */ /* PAE Paging */ +#define PTE_SIZE PAE_PTE_SIZE +#define PTE_ORDER PAE_PTE_ORDER + #define PT_ORDER PAE_PT_ORDER #define L1_PT_SHIFT PAE_L1_PT_SHIFT -- 2.39.5