From 596f885a3202159ee16cfe96d2cbfce4b348af52 Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Tue, 10 Jun 2014 15:07:11 +0100 Subject: [PATCH] xen/arm: set GICH_HCR_UIE if all the LRs are in use On return to guest, if there are no free LRs and we still have more interrupt to inject, set GICH_HCR_UIE so that we are going to receive a maintenance interrupt when no pending interrupts are present in the LR registers. The maintenance interrupt handler won't do anything anymore, but receiving the interrupt is going to cause gic_inject to be called on return to guest that is going to clear the old LRs and inject new interrupts. Signed-off-by: Stefano Stabellini Acked-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/gic.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index f441a8376b..d455031b36 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -55,6 +55,7 @@ static struct { static DEFINE_PER_CPU(uint64_t, lr_mask); static unsigned nr_lrs; +#define lr_all_full() (this_cpu(lr_mask) == ((1 << nr_lrs) - 1)) /* The GIC mapping of CPU interfaces does not necessarily match the * logical CPU numbering. Let's use mapping as returned by the GIC @@ -661,6 +662,13 @@ void gic_inject(void) vgic_vcpu_inject_irq(current, current->domain->arch.evtchn_irq); gic_restore_pending_irqs(current); + + + if ( !list_empty(¤t->arch.vgic.lr_pending) && lr_all_full() ) + GICH[GICH_HCR] |= GICH_HCR_UIE; + else + GICH[GICH_HCR] &= ~GICH_HCR_UIE; + } static void do_sgi(struct cpu_user_regs *regs, int othercpu, enum gic_sgi sgi) -- 2.39.5