From 528356f46b6f52cb0134c2b7303822ff52ea521f Mon Sep 17 00:00:00 2001 From: Yingle Hou Date: Thu, 12 Dec 2019 10:58:18 +0800 Subject: [PATCH] cpu: Remove the verification conditions of the model in the x86 signatures MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The x86ModelParseSignatures function makes an assumption that CPU signature model equals 0 as an invalid case. While in Hygon processor definition, A1 version (model 0, stepping 1) is mass production version, to support Hygon Dhyana A1 version, we have removed CPU signature model zero checking condition. Reviewed-by: Daniel P. Berrangé Signed-off-by: Yingle Hou --- src/cpu/cpu_x86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 1e913cc9fa..9b7981d574 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model, } rc = virXPathUInt("string(@model)", ctxt, &sigModel); - if (rc < 0 || sigModel == 0) { + if (rc < 0) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Invalid CPU signature model in model %s"), model->name); -- 2.39.5