From 39e7d37f0f25823c00d1105e8eb9b61182fd349c Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 27 May 2012 18:34:50 +0400 Subject: [PATCH] target-xtensa: update EXCVADDR in case of page table lookup According to ISA, 4.4.2.6, EXCVADDR may be changed by any TLB miss, even if the miss is handled entirely by processor hardware. Signed-off-by: Max Filippov Signed-off-by: Blue Swirl --- target-xtensa/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 5e7e72e11..04c4f6064 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -511,6 +511,7 @@ static int autorefill_mmu(CPUXtensaState *env, uint32_t vaddr, bool dtlb, *wi = (++env->autorefill_idx) & 0x3; split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, *wi, ei); xtensa_tlb_set_entry(env, dtlb, *wi, *ei, vpn, pte); + env->sregs[EXCVADDR] = vaddr; qemu_log("%s: autorefill(%08x): %08x -> %08x\n", __func__, vaddr, vpn, pte); } -- 2.39.5