From 20d50e4310c0926ae4dd4c592e1ca25927925a8c Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Fri, 22 Feb 2013 08:57:42 +0000 Subject: [PATCH] arm: avoid inline asm for dsb, isb, wfi and sev. "dsb" must be written "dsb sy" on arm64. "dsb sy" is also valid (and synonymous) on arm32 but we have a macro so lets use it. Signed-off-by: Ian Campbell Acked-by: Stefano Stabellini Acked-by: Tim Deegan --- xen/arch/arm/domain.c | 5 ++++- xen/arch/arm/smpboot.c | 10 ++++++---- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 63a166de7a..2445b6a276 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -29,7 +29,10 @@ void idle_loop(void) local_irq_disable(); if ( cpu_is_haltable(smp_processor_id()) ) - asm volatile ("dsb; wfi"); + { + dsb(); + wfi(); + } local_irq_enable(); do_tasklet(); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 893612333a..d9b43a8a55 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -122,7 +122,8 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) /* TODO: handle boards where CPUIDs are not contiguous */ *gate = i; flush_xen_dcache(*gate); - asm volatile("isb; sev"); + isb(); + sev(); /* And wait for it to respond */ while ( ready_cpus < i ) smp_rmb(); @@ -204,8 +205,8 @@ void stop_cpu(void) /* Make sure the write happens before we sleep forever */ dsb(); isb(); - while ( 1 ) - asm volatile("wfi"); + while ( 1 ) + wfi(); } /* Bring up a remote CPU */ @@ -220,7 +221,8 @@ int __cpu_up(unsigned int cpu) /* we need to make sure that the change to smp_up_cpu is visible to * secondary cpus with D-cache off */ flush_xen_dcache(smp_up_cpu); - asm volatile("isb; sev"); + isb(); + sev(); while ( !cpu_online(cpu) ) { -- 2.39.5