From 154c5516cb1264c9630f6100b28a7c7ed138430a Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Thu, 1 May 2008 10:26:58 +0100 Subject: [PATCH] MSI 1/6: Move PCI functions and headers to a common location. Signed-off-by: Shan Haitao Signed-off-by: Jiang Yunhong --- xen/arch/x86/domctl.c | 1 + xen/arch/x86/pci.c | 58 +++++++++++++++++++ xen/drivers/passthrough/amd/iommu_detect.c | 2 +- xen/drivers/passthrough/amd/iommu_init.c | 2 +- xen/drivers/passthrough/amd/pci_amd_iommu.c | 2 +- xen/drivers/passthrough/vtd/dmar.c | 2 +- xen/drivers/passthrough/vtd/intremap.c | 2 +- xen/drivers/passthrough/vtd/iommu.c | 29 +--------- xen/drivers/passthrough/vtd/qinval.c | 2 +- xen/drivers/passthrough/vtd/utils.c | 37 +----------- xen/include/xen/iommu.h | 21 +------ xen/include/xen/pci.h | 22 +++++++ .../passthrough => include/xen}/pci_regs.h | 0 13 files changed, 93 insertions(+), 87 deletions(-) rename xen/{drivers/passthrough => include/xen}/pci_regs.h (100%) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index a700aa9f8b..d26bf3c149 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/arch/x86/pci.c b/xen/arch/x86/pci.c index 341457b4bc..e139313e5f 100644 --- a/xen/arch/x86/pci.c +++ b/xen/arch/x86/pci.c @@ -6,6 +6,7 @@ #include #include +#include #include #include @@ -116,3 +117,60 @@ void pci_conf_write32( BUG_ON((bus > 255) || (dev > 31) || (func > 7) || (reg > 255)); pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4, data); } + +int pci_find_cap_offset(u8 bus, u8 dev, u8 func, u8 cap) +{ + u8 id; + int max_cap = 48; + u8 pos = PCI_CAPABILITY_LIST; + u16 status; + + status = pci_conf_read16(bus, dev, func, PCI_STATUS); + if ( (status & PCI_STATUS_CAP_LIST) == 0 ) + return 0; + + while ( max_cap-- ) + { + pos = pci_conf_read8(bus, dev, func, pos); + if ( pos < 0x40 ) + break; + + pos &= ~3; + id = pci_conf_read8(bus, dev, func, pos + PCI_CAP_LIST_ID); + + if ( id == 0xff ) + break; + else if ( id == cap ) + return pos; + + pos += PCI_CAP_LIST_NEXT; + } + + return 0; +} + +int pci_find_next_cap(u8 bus, unsigned int devfn, u8 pos, int cap) +{ + u8 id; + int ttl = 48; + + while ( ttl-- ) + { + pos = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos); + if ( pos < 0x40 ) + break; + + pos &= ~3; + id = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + pos + PCI_CAP_LIST_ID); + + if ( id == 0xff ) + break; + if ( id == cap ) + return pos; + + pos += PCI_CAP_LIST_NEXT; + } + return 0; +} + diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c index d3b51b9830..f713a0e15f 100644 --- a/xen/drivers/passthrough/amd/iommu_detect.c +++ b/xen/drivers/passthrough/amd/iommu_detect.c @@ -22,9 +22,9 @@ #include #include #include +#include #include #include -#include "../pci_regs.h" static int __init valid_bridge_bus_config( int bus, int dev, int func, int *sec_bus, int *sub_bus) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 8d4d713c81..a47dc987cb 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -21,10 +21,10 @@ #include #include #include +#include #include #include #include -#include "../pci_regs.h" extern int nr_amd_iommus; static struct amd_iommu *vector_to_iommu[NR_VECTORS]; diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c index 126c9abe55..af3b68fc91 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -20,11 +20,11 @@ #include #include +#include #include #include #include #include -#include "../pci_regs.h" struct list_head amd_iommu_head; long amd_iommu_poll_comp_wait = COMPLETION_WAIT_DEFAULT_POLLING_COUNT; diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c index a0a859b1af..a7f1cdedef 100644 --- a/xen/drivers/passthrough/vtd/dmar.c +++ b/xen/drivers/passthrough/vtd/dmar.c @@ -26,9 +26,9 @@ #include #include #include +#include #include #include "dmar.h" -#include "../pci_regs.h" int vtd_enabled = 1; diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrough/vtd/intremap.c index 040d7ea5d4..baa28a052d 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -23,10 +23,10 @@ #include #include #include +#include #include "iommu.h" #include "dmar.h" #include "vtd.h" -#include "../pci_regs.h" #include "msi.h" #include "extern.h" diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index bf0e5ca052..e5a8d5ec52 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -27,10 +27,10 @@ #include #include #include +#include #include #include "iommu.h" #include "dmar.h" -#include "../pci_regs.h" #include "msi.h" #include "extern.h" #include "vtd.h" @@ -1182,31 +1182,6 @@ static int domain_context_mapping_one( return 0; } -static int __pci_find_next_cap(u8 bus, unsigned int devfn, u8 pos, int cap) -{ - u8 id; - int ttl = 48; - - while ( ttl-- ) - { - pos = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos); - if ( pos < 0x40 ) - break; - - pos &= ~3; - id = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), - pos + PCI_CAP_LIST_ID); - - if ( id == 0xff ) - break; - if ( id == cap ) - return pos; - - pos += PCI_CAP_LIST_NEXT; - } - return 0; -} - #define PCI_BASE_CLASS_BRIDGE 0x06 #define PCI_CLASS_BRIDGE_PCI 0x0604 @@ -1230,7 +1205,7 @@ int pdev_type(struct pci_dev *dev) if ( !(status & PCI_STATUS_CAP_LIST) ) return DEV_TYPE_PCI; - if ( __pci_find_next_cap(dev->bus, dev->devfn, + if ( pci_find_next_cap(dev->bus, dev->devfn, PCI_CAPABILITY_LIST, PCI_CAP_ID_EXP) ) return DEV_TYPE_PCIe_ENDPOINT; diff --git a/xen/drivers/passthrough/vtd/qinval.c b/xen/drivers/passthrough/vtd/qinval.c index 21025986ff..97f4d34258 100644 --- a/xen/drivers/passthrough/vtd/qinval.c +++ b/xen/drivers/passthrough/vtd/qinval.c @@ -23,10 +23,10 @@ #include #include #include +#include #include "iommu.h" #include "dmar.h" #include "vtd.h" -#include "../pci_regs.h" #include "msi.h" #include "extern.h" diff --git a/xen/drivers/passthrough/vtd/utils.c b/xen/drivers/passthrough/vtd/utils.c index 47c6b7b83c..a90962fe7b 100644 --- a/xen/drivers/passthrough/vtd/utils.c +++ b/xen/drivers/passthrough/vtd/utils.c @@ -22,9 +22,9 @@ #include #include #include +#include #include "iommu.h" #include "dmar.h" -#include "../pci_regs.h" #include "msi.h" #include "vtd.h" @@ -96,37 +96,6 @@ void disable_pmr(struct iommu *iommu) "Disabled protected memory registers\n"); } -static u8 find_cap_offset(u8 bus, u8 dev, u8 func, u8 cap) -{ - u8 id; - int max_cap = 48; - u8 pos = PCI_CAPABILITY_LIST; - u16 status; - - status = pci_conf_read16(bus, dev, func, PCI_STATUS); - if ( (status & PCI_STATUS_CAP_LIST) == 0 ) - return 0; - - while ( max_cap-- ) - { - pos = pci_conf_read8(bus, dev, func, pos); - if ( pos < 0x40 ) - break; - - pos &= ~3; - id = pci_conf_read8(bus, dev, func, pos + PCI_CAP_LIST_ID); - - if ( id == 0xff ) - break; - else if ( id == cap ) - return pos; - - pos += PCI_CAP_LIST_NEXT; - } - - return 0; -} - #define PCI_D3hot (3) #define PCI_CONFIG_DWORD_SIZE (64) #define PCI_EXP_DEVCAP_FLR (1 << 28) @@ -140,7 +109,7 @@ void pdev_flr(u8 bus, u8 devfn) u8 dev = PCI_SLOT(devfn); u8 func = PCI_FUNC(devfn); - pos = find_cap_offset(bus, dev, func, PCI_CAP_ID_EXP); + pos = pci_find_cap_offset(bus, dev, func, PCI_CAP_ID_EXP); if ( pos != 0 ) { dev_cap = pci_conf_read32(bus, dev, func, pos + PCI_EXP_DEVCAP); @@ -163,7 +132,7 @@ void pdev_flr(u8 bus, u8 devfn) */ if ( flr == 0 ) { - pos = find_cap_offset(bus, dev, func, PCI_CAP_ID_PM); + pos = pci_find_cap_offset(bus, dev, func, PCI_CAP_ID_PM); if ( pos != 0 ) { int i; diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index b7311be81e..f87271ca2d 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -21,7 +21,7 @@ #define _IOMMU_H_ #include -#include +#include #include #include #include @@ -39,25 +39,6 @@ extern int iommu_enabled; #define PAGE_MASK_4K (((u64)-1) << PAGE_SHIFT_4K) #define PAGE_ALIGN_4K(addr) (((addr) + PAGE_SIZE_4K - 1) & PAGE_MASK_4K) -/* - * The PCI interface treats multi-function devices as independent - * devices. The slot/function address of each device is encoded - * in a single byte as follows: - * - * 15:8 = bus - * 7:3 = slot - * 2:0 = function - */ -#define PCI_DEVFN(slot,func) (((slot & 0x1f) << 3) | (func & 0x07)) -#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) -#define PCI_FUNC(devfn) ((devfn) & 0x07) - -struct pci_dev { - struct list_head list; - u8 bus; - u8 devfn; -}; - struct iommu { struct list_head list; void __iomem *reg; /* Pointer to hardware regs, virtual addr */ diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 2e4d78357c..08ec99fbee 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -9,6 +9,26 @@ #include #include +#include + +/* + * The PCI interface treats multi-function devices as independent + * devices. The slot/function address of each device is encoded + * in a single byte as follows: + * + * 15:8 = bus + * 7:3 = slot + * 2:0 = function + */ +#define PCI_DEVFN(slot,func) (((slot & 0x1f) << 3) | (func & 0x07)) +#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) +#define PCI_FUNC(devfn) ((devfn) & 0x07) + +struct pci_dev { + struct list_head list; + u8 bus; + u8 devfn; +}; uint8_t pci_conf_read8( unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg); @@ -25,5 +45,7 @@ void pci_conf_write16( void pci_conf_write32( unsigned int bus, unsigned int dev, unsigned int func, unsigned int reg, uint32_t data); +int pci_find_cap_offset(u8 bus, u8 dev, u8 func, u8 cap); +int pci_find_next_cap(u8 bus, unsigned int devfn, u8 pos, int cap); #endif /* __XEN_PCI_H__ */ diff --git a/xen/drivers/passthrough/pci_regs.h b/xen/include/xen/pci_regs.h similarity index 100% rename from xen/drivers/passthrough/pci_regs.h rename to xen/include/xen/pci_regs.h -- 2.39.5