From 07aaced4e6ea6db8b27f44636f51cafa6f1847a8 Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Thu, 12 Dec 2019 15:12:05 +0100
Subject: [PATCH] cpu_map: Add TAA_NO bit for IA32_ARCH_CAPABILITIES MSR
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

CVE-2019-11135

CPUs with TAA_NO bit of IA32_ARCH_CAPABILITIES MSR set to 1 are not
vulnerable to TSX Asynchronous Abort and passing this bit to a guest
may avoid unnecessary mitigations.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Ján Tomko <jtomko@redhat.com>
---
 src/cpu_map/x86_features.xml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index 2bed1e0372..d1180ed26d 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -502,4 +502,7 @@
   <feature name='mds-no'>
     <msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
   </feature>
+  <feature name='taa-no'>
+    <msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
+  </feature>
 </cpus>
-- 
2.39.5