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(parent: 1e577cc) | patch
target/arm: Register second AddressSpace for secure v8M CPUs
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 7 Sep 2017 12:54:52 +0000 (13:54 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 7 Sep 2017 12:54:52 +0000 (13:54 +0100)
commit1d2091bc75ab7f9e2c43082f361a528a63c79527
tree9061bfc54e70d192b4525baf445fdcf9b17cb366tree
parent1e577cc7cffd3de14dbd321de5c3ef191c6ab07fcommit | diff
target/arm: Register second AddressSpace for secure v8M CPUs

If a v8M CPU supports the security extension then we need to
give it two AddressSpaces, the same way we do already for
an A profile core with EL3.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1503414539-28762-5-git-send-email-peter.maydell@linaro.org
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