Julien Grall [Sun, 22 Jun 2014 16:13:10 +0000 (17:13 +0100)]
arm: rename intr.h into intr_machdep.h
ARM is the only architecture where the interrupt header is named "intr.h"
rather than "intr_machdep.h". There is numerous place (such as Xen) in the
generic code which need to deal with interrupt management.
Julien Grall [Mon, 26 May 2014 17:29:33 +0000 (18:29 +0100)]
arm: Add zImage support
Currently Xen on ARM is only supported zImage for guest kernel. Adding support
for ARM ELF in the toolstack looks a bit complicate for ARM (though there is
an x86 support).
Julien Grall [Fri, 6 Jun 2014 00:51:15 +0000 (01:51 +0100)]
xen/xenpv: Load xenpv as late as possible
On ARM, we only know that FreeBSD is running on Xen via a device tree node.
We have to delay xenpv initialization after the device tree has been fully
parsed.
Julien Grall [Tue, 14 Jan 2014 01:41:15 +0000 (01:41 +0000)]
xen/netfront: Define PTE flags per architecture
PG_* flags doesn't exists on ARM. As this code is not executed on this platform
(every guests use auto-translate address), it's possible to define as 0 the
flags.
Returning 0 in probe callback means: the driver can use this device. If by any
chance xencontrol is the first driver, every new device (which driver unset)
will use xencontrol.
Julien Grall [Tue, 14 Jan 2014 01:41:08 +0000 (01:41 +0000)]
xen/xenstore: xs_probe should return BUS_PROBE_NOWILDCARD
Returning 0 in probe callback means: the driver can use this device. If by any
chance xenstore is the first driver, every new device (which driver unset) will
use xenstore.
Julien Grall [Sun, 1 Jun 2014 18:15:40 +0000 (19:15 +0100)]
xen: xen_start_info don't need to be export in common code
HYPERVISOR_start_info has been introduce to be used in code common. The
variable xen_start_info is only used within amd64 and i386 architecture and
is redundant with the former variable.
Julien Grall [Wed, 4 Jun 2014 21:13:20 +0000 (22:13 +0100)]
xen/netfront: Add 2 bytes padding in the rx mbuf
The ethernet header size is not word aligned. Therefore the IP packet and so
on won't be align. On some architecture (such as ARM) unaligned access may
be slower and/or defined. Therefore we might reveice an alignement fault.
To void this case, we need to pull-up the data of ETHER_ALIGN bytes.
I'm not sure how this patch will impact x86, we need to do some benchmarking
without and with it.
I'mi also not sure m_copyup is the right function to any. Can any expert to the
network stack can tell me if there is a better solution?
Julien Grall [Sun, 1 Jun 2014 23:17:58 +0000 (00:17 +0100)]
xen/blkfront: WRITE_BARRIER and FLUSH_DISKCACHE require barrier
For WRITE_BARRIER and FLUSH_DISKCACHE operation, we don't request any cache
operation. This will result to a panic in _bus_dmamap_sync on ARM because the
operation (op = 0) is not supported.
x86 platform doesn't seem to care about this. I bet this is working fine
because only we only grant memory to the backend. Hence Xen is requiring this
memory to be cacheable. I'm wondering if we could drop the call to
bus_dmasync_map because the cache maintenance slow down the process for no
apparent reason?
For now, WRITE_BARRIER and FLUSH_DISKCACHE are an extension of the WRITE
command so require BUS_DMASYNC_PREWRITE for the cache maintenance operation.
Using memory below 4GB might cause problems with MMIO regions from physical
devices. In order to prevent that, always use memory from above the MMIO
hole for devices that hang off the xenpv bus.
Roger Pau Monne [Tue, 21 Oct 2014 15:00:57 +0000 (17:00 +0200)]
xen/intr: balance dinamic interrupts across available vCPUs
By default Xen binds all event channels to vCPU#0, and FreeBSD only shuffles
the interrupt sources once, at the end of the boot process. Since new event
channels might be created after this point (because new devices or backends
are added), try to automatically shuffle them at creation time.
This does not affect VIRQ or IPI event channels, that are already bound to a
specific vCPU as requested by the caller.
bz [Tue, 24 Mar 2015 09:46:47 +0000 (09:46 +0000)]
Make ix_crcstrip a public symbol for the moment; it probably is not
the right solution but I will leave it to experts to untangle this
problem to properly stop the build failures.
At the moment only if_ix.c includes dev/netmap/ixgbe_netmap.h which is
good as ixgbe_netmap.h defines a couple of (file) static variables--thus
local to if_ix.c.
static int ix_crcstrip however now also got checked from ix_txrx.c
(as an extern) and should not be visible there. In fact we do see
powerpc and powerpc64 build failures because of this. It is unclear
to me why on other (clang built?) architectures this does not lead
to a reference of an undefined symbol and similar build breakage.
edwin [Tue, 24 Mar 2015 05:52:28 +0000 (05:52 +0000)]
MFV of 280411,tzdata{2015b}
Release 2015b - 2015-03-19 23:28:11 -0700
Changes affecting future time stamps
Mongolia will start observing DST again this year, from the last
Saturday in March at 02:00 to the last Saturday in September at 00:00.
(Thanks to Ganbold Tsagaankhuu.)
Palestine will start DST on March 28, not March 27. Also,
correct the fall 2014 transition from September 26 to October 24.
Adjust future predictions accordingly. (Thanks to Steffen Thorsen.)
Changes affecting past time stamps
The 1982 zone shift in Pacific/Easter has been corrected, fixing a 2015a
regression. (Thanks to Stuart Bishop for reporting the problem.)
Some more zones have been turned into links, when they differed
from existing zones only for older time stamps. As usual,
these changes affect UTC offsets in pre-1970 time stamps only.
Their old contents have been moved to the 'backzone' file.
The affected zones are: America/Antigua, America/Cayman,
Pacific/Midway, and Pacific/Saipan.
Changes affecting time zone abbreviations
Correct the 1992-2010 DST abbreviation in Volgograd from "MSK" to "MSD".
(Thanks to Hank W.)
ian [Mon, 23 Mar 2015 22:42:42 +0000 (22:42 +0000)]
Do not save/restore the TLS pointer on context switch for armv6. The
pointer cannot be changed directly by userland code on armv6 (it can be on
armv4), so there's no need to save/restore.
dim [Mon, 23 Mar 2015 21:13:29 +0000 (21:13 +0000)]
Pull in r230348 from upstream llvm trunk (by Tim Northover):
ARM: treat [N x i32] and [N x i64] as AAPCS composite types
The logic is almost there already, with our special homogeneous
aggregate handling. Tweaking it like this allows front-ends to emit
AAPCS compliant code without ever having to count registers or add
discarded padding arguments.
Only arrays of i32 and i64 are needed to model AAPCS rules, but I
decided to apply the logic to all integer arrays for more consistency.
This fixes a possible "Unexpected member type for HA" error when
compiling lib/msun/bsdsrc/b_tgamma.c for armv6.
benno [Mon, 23 Mar 2015 18:45:37 +0000 (18:45 +0000)]
Be consistent with M_ZERO when allocating ccbs.
There are four places, all in cam_xpt.c, where ccbs are malloc'ed. Two of
these use M_ZERO, two don't. The two that don't meant that allocated ccbs
had trash in them making it hard to debug errors where they showed up. Due
to this, use M_ZERO all the time when allocating ccbs.
dteske [Mon, 23 Mar 2015 17:31:22 +0000 (17:31 +0000)]
Add missing variables password/bootlock_password.
NB: Using NULL for default values in-case someone
or something uncomments it and reboots. See
check-password.4th(8) for additional details.