Recent git versions place the submodule git repos into the
.git/modules directory of the toplevel repo. In that case
.git of the seabios tree isn't a directory, but a regular
file, saying where the gitdir is.
Extent the git check to also allow .git being a regular file,
so buildversion.sh works correctly when called within the qemu
submodule.
Qemu commit 9ee59f3 removed the bochs bios apm interface emulation at
port 0x8900. That broke poweroff via APM. Fix it by powering off the
machine using the acpi pm control register.
Old code is left in, so seabios wil try both poweroff methods. Cleaning
that eventually up is left for another patch, after checking it isn't
needed. Qemu never implemented "Standby" and "Suspend", only
"Shutdown", so it looks like there might be non-qemu use cases (bochs
probably).
Easiest way to test this is the syslinux poweroff module; modern linux
distros usually have CONFIG_APM turned off.
Reported-by: Sebastian Herbszt <herbszt@gmx.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
(cherry picked from commit 5b63109242042372c1d6c3d23602e980f1c9637b)
Q35 support was originally written before these commits in seabios, PIIX
got updated, Q35 didn't. QEMU uses the same clock for both so there's
no reason for these bits to differ. Sync them up.
Kevin O'Connor [Fri, 14 Jun 2013 01:24:14 +0000 (21:24 -0400)]
Another fix for hlist_for_each_entry_safe.
Although the previous patch does fix hlist_for_each_entry_safe for the
common case, it doesn't work correctly when deleting the current
node. To fix this, introduce two macros - hlist_for_each_entry_safe
for iterating through a list that can be modified, and
hlist_for_each_entry_pprev for those users that only need access to
the "pprev" pointer.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Gerd Hoffmann [Thu, 13 Jun 2013 05:42:58 +0000 (07:42 +0200)]
tweak coreboot qemu detection
I have patches for coreboot in the queue adding q35 support there,
which will change the mainboard names (adding the detected chipset).
Make SeaBIOS check the mainboard name starts with "QEMU" instead of
doing a full string match to handle this.
Kevin O'Connor [Sat, 23 Mar 2013 15:38:45 +0000 (11:38 -0400)]
Cleanup QEMU_CFG_NUMA fw_cfg processing - split into two romfile entries.
The QEMU_CFG_NUMA fw_cfg entry is actually two separate tables in one
fw_cfg entry - a table for cpu affinity and a table for the memory
map. Create two romfile entries to make that more clear.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Since commit f7e4dd6c18ccfbaf6cd2f5eaaed2b77cabc8a406 QEMU loads its
own copy of DSDT, so let's not build in PIIX. This makes building in
the DSDT an option, default to on (built-in). If no one complains for a
while, we'll be able to switch it off and then maybe remove altogether.
With CONFIG_ACPI_DSDT = y
Total size: 127348 Fixed: 58892 Free: 3724 (used 97.2% of 128KiB rom)
With CONFIG_ACPI_DSDT = n
Total size: 122844 Fixed: 58884 Free: 8228 (used 93.7% of 128KiB rom)
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Alex Williamson [Wed, 20 Mar 2013 16:58:47 +0000 (10:58 -0600)]
pciinit: Enable default VGA device
As QEMU gains PCI bridge and PCIe root port support, we won't always
find the VGA device on the root bus. We therefore need to add support
to find and enable a VGA device and the path to it through the VGA
Enable support in the PCI bridge control register.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Kevin O'Connor [Tue, 19 Mar 2013 00:26:54 +0000 (20:26 -0400)]
mptable: Use same PCI irqs as ACPI code.
The ACPI code has a hardcoded list of PCI interrupts. Use that same
list in the mptable code generation. This will ensure that both
tables are in synch - it may also make the mptable easier to generate
from QEMU.
Also, move the irq0_override lookup outside of the irq loop.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Mar 2013 00:14:21 +0000 (20:14 -0400)]
mptable: Don't describe pci-to-pci bridges.
It should not be necessary to describe PCI-to-PCI bridges in the
mptable. (The mptable was designed to fit in ROM, so it seems
unlikely that it would be used for bridges that could be dynamically
added.) Describing only the root bus should make it easier to port
this content into QEMU.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sun, 17 Mar 2013 14:32:05 +0000 (10:32 -0400)]
Set ZF prior to keyboard read call in check_for_keystroke().
Set the ZF flag to make sure the keyboard interrupt is actively
clearing it on a key event. This fixes a hang when CONFIG_BOOTMENU is
on and CONFIG_KEYBOARD is off.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 18:04:47 +0000 (13:04 -0500)]
vgabios: Fix cirrus memory clear on mode switch.
The cirrus_clear_vram() code wasn't actually doing anything because of
a u8 overflow. Fix that.
Fill with 0xff when performing a legacy cirrus mode switch (WinXP has
been observed to incorrectly render dialog boxes if the memory is
filled to 0). This was the behavior of the original LGPL vgabios
code. To support this, add mechanism (MF_LEGACY) to allow vga drivers
to detect if the mode switch is from vesa or int10.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:39:49 +0000 (19:39 -0500)]
Use VARVERIFY32INIT on global variables that point to "tmp" memory.
Enable the recently added build check on global variables that are (or
contain) pointers to memory allocated by malloc_tmp(). This helps
detect cases where temporary memory is accessed after POST.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:36:28 +0000 (19:36 -0500)]
Add VARVERIFY32INIT attribute for variables only available during "init".
Add a build check to verify certain variables are only reachable via
the 32bit "init" code. This can be used as a mechanism to enforce
certain data (and code that accesses that data) as only available
during POST.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:33:39 +0000 (19:33 -0500)]
smm: Don't use PCIDevices list in smm_setup().
The smm_setup() call is invoked from resume. The PCIDevices list is
only valid during POST. Cache the necessary PCI BDF ids so that
PCIDevices isn't needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:31:14 +0000 (19:31 -0500)]
shadow: Don't use PCIDevices list in make_bios_readonly().
The make_bios_readonly() call is invoked from resume. The PCIDevices
list is only valid during POST. Cache the necessary PCI BDF ids so
that PCIDevices isn't needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 5 Mar 2013 09:52:21 +0000 (17:52 +0800)]
Cache boot-fail-wait to avoid romfile access after POST.
Memory allocated with malloc_tmp() can't be used after the POST phase.
So, access boot-fail-wait in post phase and store it for the boot
phase to use. This fixes the regression introduced by commit 59d6ca52.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Signed-off-by: Amos Kong <akong@redhat.com>
Kevin O'Connor [Sun, 3 Mar 2013 02:26:54 +0000 (21:26 -0500)]
floppy: Clean up Check Interrupt Status code.
Don't run the Check Interrupt Status command from the floppy hardware
interrupt handler. Instead, run it where it is needed - after
controller startup and after a recalibration command. Also, use
floppy_pio() to issue the command instead of open coding it.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 2 Mar 2013 23:14:35 +0000 (18:14 -0500)]
Support using the "extra stack" for all 16bit irq entry points.
Using the internal stack reduces the amount of space that SeaBIOS uses
on the caller's stack. This is known to help some very old operating
systems (like DOS 1.0). However, there is a possibility that this
will break any operating systems that calls a legacy 16bit irq in
16bit protected mode (no OSes have yet to be identified as doing
this), so make the ability config dependent.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 23 Feb 2013 15:37:58 +0000 (10:37 -0500)]
Try to detect an unsuccessful hard-reboot to prevent soft-reboot loops.
There have been various kvm bugs that prevent reboots from working
properly. Generalize the existing test for a failed reboot to better
catch these cases.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Alex Williamson [Thu, 21 Feb 2013 16:12:23 +0000 (09:12 -0700)]
seabios: Add a dummy PCI slot to irq mapping function
This should never get called, but if we somehow get a new chipset
that fails to implement their own pci_slot_get_irq function, fail
gracefully and add a debug log message.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Alex Williamson [Fri, 15 Feb 2013 21:11:41 +0000 (14:11 -0700)]
seabios q35: Add new PCI slot to irq routing function
q35/ich9 doesn't use the same interrupt mapping function as
i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we
start at index 0, not index -1. Slots 25 through 31 are also
programmed independently.
When running qemu w/o this patch, a device at address 0:6.0 will have
its PCI interrupt line register programmed with irq 10 (as seen by
info pci), but it actually uses irq 11 (as reported the guest). Half
of the interrupt lines are misprogrammedi like this. Functionally, a
fully emulated qemu guest doesn't care much, but when we try to use
device assignment, we really need to know the correct irqs.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Kevin O'Connor [Wed, 20 Feb 2013 02:35:20 +0000 (21:35 -0500)]
Eliminate separate BiosTableSpace[] space for f-segment allocations.
The BiosTableSpace variable was used to ensure there was sufficient
space in the f-segment for malloc_fseg() calls. However, it added 2K
to the final image size to reserve that space.
Update the build to determine where to put the f-segment allocations.
In most cases (when code relocation is enabled) allocations can be
done in the space free'd from the "init" sections and no additional
space needs to be reserved in the final image. This also has the
benefit of not fragmenting the f-segment allocation space.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 06:33:45 +0000 (01:33 -0500)]
Calculate "RamSize" needed by 16bit interface dynamically.
Calculate a LegacyRamSize directly from the e820 map for use by
handle_1588() and handle_15e801() (the only two external interfaces
that require "RamSize"). All other users of the existing RamSize (and
RamSizeOver4G) variables are specific to QEMU, so move the
declarations to paravirt.c.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 06:02:50 +0000 (01:02 -0500)]
Don't relocate "varlow" variable references at runtime.
Since the final location of the "varlow" variables are known at build
time, link the final locations into the binary during the build. The
16bit code was already done at link time - update the build so the
32bit code is also done at link time.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 04:36:03 +0000 (23:36 -0500)]
Convert VAR16VISIBLE, VAR16EXPORT, and VAR32VISIBLE to VARFSEG.
Convert all users of the alternative variable exports to VARFSEG.
There isn't a significant distinction between the existing types of
exports, so it's simpler to just use one type going forward.
The new VARFSEG declaration is only emitting when in 32bit mode, so
update and move some variables as needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Alex Williamson [Fri, 15 Feb 2013 21:11:35 +0000 (14:11 -0700)]
seabios q35: Enable all PIRQn IRQs at startup
We seem to use the IRQEN bit of the PIRQn registers interchangeably
to select APIC mode or to disable an IRQ. I can't decide if we're
intending to disable the IRQ or select APIC mode here, but in either
case it prevents PIC mode assigned devices from working. When seabios
writes IRQEN to these registers, qemu interprets that as APIC mode,
so while the boot ROM driver is waiting for an interrupt on ISA
compatible IRQ 10 or 11, KVM is injecting interrupts to APIC pins
16 - 23. Devices on the root bus use PIRQE:H while the root ports
use PIRQA:D. Enable them all so we don't limit where we support boot
ROMs. The guest will later disable unused IRQs with the ACPI _DIS
method.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Kevin O'Connor [Mon, 18 Feb 2013 15:28:55 +0000 (10:28 -0500)]
Verify CC is valid during build tests.
Update test-build.sh to report if it can't run the c compiler at all.
Without this test, a totally non-working build environment will yield
an "invalid LD" message which can be confusing.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sun, 17 Feb 2013 18:58:28 +0000 (13:58 -0500)]
Clarify build generated "zone low" values.
Rename datalow_base (and similar) to zonelow_base, and datalow_start
(and similar) to varlow_start. This helps distinguish between the
bounds for the runtime dynamic memory pool and the compile time global
variables.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Laszlo Ersek [Thu, 14 Feb 2013 04:43:32 +0000 (05:43 +0100)]
Enable VGA output when setting Cirrus-specific mode
This patch does the same for Cirrus as David's following patch for bochs,
originally posted under
<http://www.seabios.org/pipermail/seabios/2013-February/005434.html>:
Enable VGA output when settings bochs-specific mode
When used from OVMF+CSM, we got no video output. It appears that we were
never enabling the display output except when configuring a text mode.
Which never happens, in the OVMF+CSM case.
In my testing on RHEL-6.3 with OVMF -D CSM_ENABLE / CONFIG_CSM bios.bin /
CONFIG_QEMU vgabios.bin, using Cirrus, VESA mode 0x115 is selected (Direct
Color, 800x600x24).
According to <http://www.osdever.net/FreeVGA/vga/attrreg.htm>,
cirrus_switch_mode()
stdvga_attr_mask()
currently keeps/sets the "Attribute Controller Graphics Enable" bit set in
the "Attribute Mode Control Register". When invoked from OVMF+CSM, that is
not enough however, so let's do the same as for Bochs:
stdvga_attrindex_write(0x20);
which corresponds to setting the "Palette Address Source" bit in the
"Attribute Address Register":
"This bit is set to 0 to load color values to the registers in the
internal palette. It is set to 1 for normal operation of the attribute
controller. [...]"
clext_set_mode()
stdvga_set_mode() -- for regular modes
stdvga_attrindex_write() -- existing call
cirrus_switch_mode() -- for Cirrus modes
stdvga_attrindex_write() -- call added by this patch
Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Fri, 8 Feb 2013 15:50:54 +0000 (15:50 +0000)]
Enable VGA output when settings bochs-specific mode
When used from OVMF+CSM, we got no video output. It appears that we were
never enabling the display output except when configuring a text mode.
Which never happens, in the OVMF+CSM case.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Thu, 14 Feb 2013 08:56:20 +0000 (08:56 +0000)]
Make CONFIG_OPTIONROMS_DEPLOYED depend on CONFIG_QEMU
Potentially we could even kill it off completely, since it only works
with old versions of Qemu. But it can stay for now as long as it doesn't
offend me in the CSM build...
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
projects / people / andrewcoop / seabios.git / log