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2 years agoi386/xen: handle VCPUOP_register_vcpu_time_info
Joao Martins [Mon, 23 Jul 2018 15:24:36 +0000 (11:24 -0400)]
i386/xen: handle VCPUOP_register_vcpu_time_info

In order to support Linux vdso in Xen.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: handle VCPUOP_register_vcpu_info
Joao Martins [Fri, 29 Jun 2018 14:54:50 +0000 (10:54 -0400)]
i386/xen: handle VCPUOP_register_vcpu_info

Handle the hypercall to set a per vcpu info, and also wire up the default
vcpu_info in the shared_info page for the first 32 vCPUs.

To avoid deadlock within KVM a vCPU thread must set its *own* vcpu_info
rather than it being set from the context in which the hypercall is
invoked.

Add the vcpu_info (and default) GPA to the vmstate_x86_cpu for migration,
and restore it in kvm_arch_put_registers() appropriately.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement HYPERVISOR_vcpu_op
Joao Martins [Mon, 18 Jun 2018 16:26:44 +0000 (12:26 -0400)]
i386/xen: implement HYPERVISOR_vcpu_op

This is simply when guest tries to register a vcpu_info
and since vcpu_info placement is optional in the minimum ABI
therefore we can just fail with -ENOSYS

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement HYPERVISOR_hvm_op
Joao Martins [Mon, 18 Jun 2018 16:21:57 +0000 (12:21 -0400)]
i386/xen: implement HYPERVISOR_hvm_op

This is when guest queries for support for HVMOP_pagetable_dying.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement XENMEM_add_to_physmap_batch
David Woodhouse [Thu, 15 Dec 2022 10:39:30 +0000 (10:39 +0000)]
i386/xen: implement XENMEM_add_to_physmap_batch

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement HYPERVISOR_memory_op
Joao Martins [Mon, 18 Jun 2018 16:17:42 +0000 (12:17 -0400)]
i386/xen: implement HYPERVISOR_memory_op

Specifically XENMEM_add_to_physmap with space XENMAPSPACE_shared_info to
allow the guest to set its shared_info page.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Use the xen_overlay device, add compat support]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: manage and save/restore Xen guest long_mode setting
David Woodhouse [Mon, 12 Dec 2022 14:03:41 +0000 (14:03 +0000)]
i386/xen: manage and save/restore Xen guest long_mode setting

Xen will "latch" the guest's 32-bit or 64-bit ("long mode") setting when
the guest writes the MSR to fill in the hypercall page, or when the guest
sets the event channel callback in HVM_PARAM_CALLBACK_IRQ.

KVM handles the former and sets the kernel's long_mode flag accordingly.
The latter will be handled in userspace. Keep them in sync by noticing
when a hypercall is made in a mode that doesn't match qemu's idea of
the guest mode, and resyncing from the kernel. Do that same sync right
before serialization too, in case the guest has set the hypercall page
but hasn't yet made a system call.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: add pc_machine_kvm_type to initialize XEN_EMULATE mode
David Woodhouse [Mon, 12 Dec 2022 23:40:45 +0000 (23:40 +0000)]
i386/xen: add pc_machine_kvm_type to initialize XEN_EMULATE mode

The xen_overlay device (and later similar devices for event channels and
grant tables) need to be instantiated. Do this from a kvm_type method on
the PC machine derivatives, since KVM is only way to support Xen emulation
for now.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agohw/xen: Add xen_overlay device for emulating shared xenheap pages
David Woodhouse [Wed, 7 Dec 2022 09:19:31 +0000 (09:19 +0000)]
hw/xen: Add xen_overlay device for emulating shared xenheap pages

For the shared info page and for grant tables, Xen shares its own pages
from the "Xen heap" to the guest. The guest requests that a given page
from a certain address space (XENMAPSPACE_shared_info, etc.) be mapped
to a given GPA using the XENMEM_add_to_physmap hypercall.

To support that in qemu when *emulating* Xen, create a memory region
(migratable) and allow it to be mapped as an overlay when requested.

Xen theoretically allows the same page to be mapped multiple times
into the guest, but that's hard to track and reinstate over migration,
so we automatically *unmap* any previous mapping when creating a new
one. This approach has been used in production with.... a non-trivial
number of guests expecting true Xen, without any problems yet being
noticed.

This adds just the shared info page for now. The grant tables will be
a larger region, and will need to be overlaid one page at a time. I
think that means I need to create separate aliases for each page of
the overall grant_frames region, so that they can be mapped individually.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: Implement SCHEDOP_poll and SCHEDOP_yield
David Woodhouse [Wed, 14 Dec 2022 21:50:41 +0000 (21:50 +0000)]
i386/xen: Implement SCHEDOP_poll and SCHEDOP_yield

They both do the same thing and just call sched_yield. This is enough to
stop the Linux guest panicking when running on a host kernel which doesn't
intercept SCHEDOP_poll and lets it reach userspace.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement HYPERVISOR_sched_op, SCHEDOP_shutdown
Joao Martins [Fri, 20 Jul 2018 19:19:05 +0000 (15:19 -0400)]
i386/xen: implement HYPERVISOR_sched_op, SCHEDOP_shutdown

It allows to shutdown itself via hypercall with any of the 3 reasons:
  1) self-reboot
  2) shutdown
  3) crash

Implementing SCHEDOP_shutdown sub op let us handle crashes gracefully rather
than leading to triple faults if it remains unimplemented.

In addition, the SHUTDOWN_soft_reset reason is used for kexec, to reset
Xen shared pages and other enlightenments and leave a clean slate for the
new kernel without the hypervisor helpfully writing information at
unexpected addresses.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Ditch sched_op_compat which was never available for HVM guests,
        Add SCHEDOP_soft_reset]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: implement HYPERVISOR_xen_version
Joao Martins [Thu, 14 Jun 2018 12:29:45 +0000 (08:29 -0400)]
i386/xen: implement HYPERVISOR_xen_version

This is just meant to serve as an example on how we can implement
hypercalls. xen_version specifically since Qemu does all kind of
feature controllability. So handling that here seems appropriate.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Implement kvm_gva_rw() safely]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/xen: handle guest hypercalls
Joao Martins [Wed, 13 Jun 2018 14:14:31 +0000 (10:14 -0400)]
i386/xen: handle guest hypercalls

This means handling the new exit reason for Xen but still
crashing on purpose. As we implement each of the hypercalls
we will then return the right return code.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Add CPL to hypercall tracing, disallow hypercalls from CPL > 0]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
2 years agoxen-platform: allow its creation with XEN_EMULATE mode
Joao Martins [Tue, 19 Jun 2018 10:44:46 +0000 (06:44 -0400)]
xen-platform: allow its creation with XEN_EMULATE mode

The only thing we need to fix to make this build is the PIO hack which
sets the BIOS memory areas to R/W v.s. R/O. Theoretically we could hook
that up to the PAM registers on the emulated PIIX, but in practice
nobody cares, so just leave it doing nothing.

Now it builds without actual Xen, move it to CONFIG_XEN_BUS to include it
in the KVM-only builds.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoxen-platform: exclude vfio-pci from the PCI platform unplug
Joao Martins [Fri, 18 Jan 2019 19:29:52 +0000 (14:29 -0500)]
xen-platform: exclude vfio-pci from the PCI platform unplug

Such that PCI passthrough devices work for Xen emulated guests.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/hvm: Set Xen vCPU ID in KVM
David Woodhouse [Fri, 16 Dec 2022 11:05:29 +0000 (11:05 +0000)]
i386/hvm: Set Xen vCPU ID in KVM

There are (at least) three different vCPU ID number spaces. One is the
internal KVM vCPU index, based purely on which vCPU was chronologically
created in the kernel first. If userspace threads are all spawned and
create their KVM vCPUs in essentially random order, then the KVM indices
are basically random too.

The second number space is the APIC ID space, which is consistent and
useful for referencing vCPUs. MSIs will specify the target vCPU using
the APIC ID, for example, and the KVM Xen APIs also take an APIC ID
from userspace whenever a vCPU needs to be specified (as opposed to
just using the appropriate vCPU fd).

The third number space is not normally relevant to the kernel, and is
the ACPI/MADT/Xen CPU number which corresponds to cs->cpu_index. But
Xen timer hypercalls use it, and Xen timer hypercalls *really* want
to be accelerated in the kernel rather than handled in userspace, so
the kernel needs to be told.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/kvm: handle Xen HVM cpuid leaves
Joao Martins [Tue, 6 Dec 2022 10:48:53 +0000 (10:48 +0000)]
i386/kvm: handle Xen HVM cpuid leaves

Introduce support for emulating CPUID for Xen HVM guests. It doesn't make
sense to advertise the KVM leaves to a Xen guest, so do Xen unconditionally
when the xen-version machine property is set.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Obtain xen_version from KVM property, make it automatic]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoi386/kvm: Add xen-version KVM accelerator property and init KVM Xen support
David Woodhouse [Sat, 3 Dec 2022 17:51:13 +0000 (09:51 -0800)]
i386/kvm: Add xen-version KVM accelerator property and init KVM Xen support

This just initializes the basic Xen support in KVM for now. Only permitted
on TYPE_PC_MACHINE because that's where the sysbus devices for Xen heap
overlay, event channel, grant tables and other stuff will exist. There's
no point having the basic hypercall support if nothing else works.

Provide sysemu/kvm_xen.h and a kvm_xen_get_caps() which will be used
later by support devices.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoxen: Add XEN_DISABLED mode and make it default
David Woodhouse [Mon, 12 Dec 2022 22:32:54 +0000 (22:32 +0000)]
xen: Add XEN_DISABLED mode and make it default

Also set XEN_ATTACH mode in xen_init() to reflect the truth; not that
anyone ever cared before. It was *only* ever checked in xen_init_pv()
before.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoxen: add CONFIG_XEN_BUS and CONFIG_XEN_EMU options for Xen emulation
David Woodhouse [Tue, 6 Dec 2022 09:03:48 +0000 (09:03 +0000)]
xen: add CONFIG_XEN_BUS and CONFIG_XEN_EMU options for Xen emulation

The XEN_EMU option will cover core Xen support in target/, which exists
only for x86 with KVM today but could theoretically also be implemented
on Arm/Aarch64 and with TCG or other accelerators (if anyone wants to
run the gauntlet of struct layout compatibility, errno mapping, and the
rest of that fui).

It will also cover the support for architecture-independent grant table
and event channel support which will be added in hw/i386/kvm/ (on the
basis that the non-KVM support is very theoretical and making it not use
KVM directly seems like gratuitous overengineering at this point).

The XEN_BUS option is for the xenfv platform support, which will now be
used both by XEN_EMU and by real Xen.

The XEN option remains dependent on the Xen runtime libraries, and covers
support for real Xen. Some code which currently resides under CONFIG_XEN
will be moving to CONFIG_XEN_BUS over time as the direct dependencies on
Xen runtime libraries are eliminated. The Xen PCI platform device will
also reside under CONFIG_XEN_BUS.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoinclude: import Xen public headers to include/standard-headers/
Joao Martins [Wed, 13 Feb 2019 17:29:47 +0000 (12:29 -0500)]
include: import Xen public headers to include/standard-headers/

There are already some partial headers in include/hw/xen/interface/
which will be removed once we migrate users to the new location.

To start with, define __XEN_TOOLS__ in hw/xen/xen.h to ensure that any
internal definitions needed by Xen toolstack libraries are present
regardless of the order in which the headers are included. A reckoning
will come later, once we make the PV backends work in emulation and
untangle the headers for Xen-native vs. generic parts.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
[dwmw2: Update to Xen public headers from 4.16.2 release, add some in io/,
        define __XEN_TOOLS__ in hw/xen/xen.h]
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>
2 years agoMerge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier...
Peter Maydell [Thu, 19 Jan 2023 15:05:29 +0000 (15:05 +0000)]
Merge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

trivial branch pull request 20230118

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# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
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* tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu:
  hw/ssi/sifive_spi.c: spelling: reigster
  hw/cxl/cxl-host: Fix an error message typo
  hw/cxl/cxl-cdat.c: spelling: missmatch
  hw/pvrdma: Protect against buggy or malicious guest driver
  ccid-card-emulated: fix cast warning/error
  hw/i386/pc: Remove unused 'owner' argument from pc_pci_as_mapping_init
  tests/qtest/test-hmp: Improve the check for verbose mode
  hw/usb: Mark the XLNX_VERSAL-related files as target-independent
  hw/intc: Mark more interrupt-controller files as target independent
  hw/cpu: Mark arm11 and realview mpcore as target-independent code
  hw/arm: Move various units to softmmu_ss[]
  hw/tpm: Move tpm_ppi.c out of target-specific source set
  hw/intc: Move some files out of the target-specific source set
  hw/display: Move omap_lcdc.c out of target-specific source set
  Call qemu_socketpair() instead of socketpair() when possible

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell [Thu, 19 Jan 2023 11:56:50 +0000 (11:56 +0000)]
Merge tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu into staging

tcg: Fix race conditions in (most) goto_tb implementations

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# gpg: Signature made Tue 17 Jan 2023 23:08:17 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu: (22 commits)
  tcg/riscv: Implement direct branch for goto_tb
  tcg/riscv: Introduce OPC_NOP
  tcg/arm: Implement direct branch for goto_tb
  tcg/sparc64: Reorg goto_tb implementation
  tcg/sparc64: Remove USE_REG_TB
  tcg/ppc: Reorg goto_tb implementation
  tcg/aarch64: Reorg goto_tb implementation
  tcg: Remove TCG_TARGET_HAS_direct_jump
  tcg: Always define tb_target_set_jmp_target
  tcg: Move tb_target_set_jmp_target declaration to tcg.h
  tcg: Change tb_target_set_jmp_target arguments
  tcg: Add TranslationBlock.jmp_insn_offset
  tcg: Add gen_tb to TCGContext
  tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID
  tcg: Split out tcg_out_goto_tb
  tcg: Introduce get_jmp_target_addr
  tcg: Introduce set_jmp_insn_offset
  tcg: Replace asserts on tcg_jmp_insn_offset
  tcg/sparc64: Remove unused goto_tb code for indirect jump
  tcg/ppc: Remove unused goto_tb code for indirect jump
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge tag 'pull-request-2023-01-18' of https://gitlab.com/thuth/qemu into staging
Peter Maydell [Wed, 18 Jan 2023 19:09:21 +0000 (19:09 +0000)]
Merge tag 'pull-request-2023-01-18' of https://gitlab.com/thuth/qemu into staging

* Fix the FreeBSD CI jobs in Gitlab by upgrading the packages in the beginning
* Fix the Haiku VM test by updating it to r1beta4
* Allow "make uninstall"
* Rename TARGET_FMT_plx to HWADDR_FMT_plx
* Some small qtest fixes/improvements
* Check for valid amount of CPUs before starting a secure execution s390x guest

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# gpg: Signature made Wed 18 Jan 2023 11:31:30 GMT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2023-01-18' of https://gitlab.com/thuth/qemu:
  s390x/pv: Implement a CGS check helper
  tests/vm/haiku.x86_64: Update the Haiku VM to Beta 4
  tests/qtest/libqos/e1000e: Remove duplicate register definitions
  tests/qtest/e1000e-test: Fix the code style
  tests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI
  MAINTAINERS: Remove bouncing mail address from Kamil Rytarowski
  bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
  Makefile: allow 'make uninstall'
  Upgrade all packages in the FreeBSD VMs to ensure the freshness

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agos390x/pv: Implement a CGS check helper
Cédric Le Goater [Mon, 16 Jan 2023 17:46:05 +0000 (18:46 +0100)]
s390x/pv: Implement a CGS check helper

When a protected VM is started with the maximum number of CPUs (248),
the service call providing information on the CPUs requires more
buffer space than allocated and QEMU disgracefully aborts :

    LOADPARM=[........]
    Using virtio-blk.
    Using SCSI scheme.
    ...................................................................................
    qemu-system-s390x: KVM_S390_MEM_OP failed: Argument list too long

When protected virtualization is initialized, compute the maximum
number of vCPUs supported by the machine and return useful information
to the user before the machine starts in case of error.

Suggested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20230116174607.2459498-2-clg@kaod.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotests/vm/haiku.x86_64: Update the Haiku VM to Beta 4
Thomas Huth [Mon, 16 Jan 2023 08:30:14 +0000 (09:30 +0100)]
tests/vm/haiku.x86_64: Update the Haiku VM to Beta 4

The old Haiku VM based on Beta 3 does not work anymore since it
fails to install the additional packages now that Beta 4 has been
released. Thanks to Alexander von Gluck IV for providing a new
image based on Beta 4, we can now upgrade the test image in our
QEMU CI, too, to get this working again.

Note that Haiku Beta 4 apparently finally fixed the issue with
the enumeration of the virtio-block devices (see the ticket at
https://dev.haiku-os.org/ticket/16512 ) - the tarball disk can
now be found at index 1 instead of index 0.

Message-Id: <20230116083014.55647-1-thuth@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotests/qtest/libqos/e1000e: Remove duplicate register definitions
Akihiko Odaki [Sat, 14 Jan 2023 03:59:19 +0000 (12:59 +0900)]
tests/qtest/libqos/e1000e: Remove duplicate register definitions

The register definitions in tests/qtest/libqos/e1000e.h had names
different from hw/net/e1000_regs.h, which made it hard to understand
what test codes corresponds to the implementation. Use
hw/net/e1000_regs.h from tests/qtest/libqos/e1000e.c to remove
these duplications.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230114035919.35251-20-akihiko.odaki@daynix.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotests/qtest/e1000e-test: Fix the code style
Akihiko Odaki [Sat, 14 Jan 2023 03:59:18 +0000 (12:59 +0900)]
tests/qtest/e1000e-test: Fix the code style

igb implementation first starts off by copying e1000e code. Correct the
code style before that.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230114035919.35251-19-akihiko.odaki@daynix.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI
Fabiano Rosas [Fri, 13 Jan 2023 14:04:13 +0000 (11:04 -0300)]
tests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI

We will soon enable the build without TCG, which does not support many
machines, so only run the bcm2835-dma-test when the corresponding
machine is present.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20230113140419.4013-23-farosas@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agoMAINTAINERS: Remove bouncing mail address from Kamil Rytarowski
Thomas Huth [Fri, 13 Jan 2023 08:17:35 +0000 (09:17 +0100)]
MAINTAINERS: Remove bouncing mail address from Kamil Rytarowski

When sending mail to Kamil's address, it's bouncing with a message
that the mailbox is full. This already happens since summer 2022,
and the last message that Kamil sent to the qemu-devel mailing list
is from November 2021 (as far as I can see), so we unfortunately
have to assume that this e-mail address is not valid anymore.

Message-Id: <20230113081735.1148057-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agobulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
Philippe Mathieu-Daudé [Tue, 10 Jan 2023 21:29:47 +0000 (22:29 +0100)]
bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx

The 'hwaddr' type is defined in "exec/hwaddr.h" as:

    hwaddr is the type of a physical address
   (its size can be different from 'target_ulong').

All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:

 $ fgrep define include/exec/hwaddr.h
 #define HWADDR_H
 #define HWADDR_BITS 64
 #define HWADDR_MAX UINT64_MAX
 #define TARGET_FMT_plx "%016" PRIx64
         ^^^^^^
 #define HWADDR_PRId PRId64
 #define HWADDR_PRIi PRIi64
 #define HWADDR_PRIo PRIo64
 #define HWADDR_PRIu PRIu64
 #define HWADDR_PRIx PRIx64
 #define HWADDR_PRIX PRIX64

Since hwaddr's size can be *different* from target_ulong, it is
very confusing to read one of its format using the 'TARGET_FMT_'
prefix, normally used for the target_long / target_ulong types:

$ fgrep TARGET_FMT_ include/exec/cpu-defs.h
 #define TARGET_FMT_lx "%08x"
 #define TARGET_FMT_ld "%d"
 #define TARGET_FMT_lu "%u"
 #define TARGET_FMT_lx "%016" PRIx64
 #define TARGET_FMT_ld "%" PRId64
 #define TARGET_FMT_lu "%" PRIu64

Apparently this format was missed during commit a8170e5e97
("Rename target_phys_addr_t to hwaddr"), so complete it by
doing a bulk-rename with:

 $ sed -i -e s/TARGET_FMT_plx/HWADDR_FMT_plx/g $(git grep -l TARGET_FMT_plx)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110212947.34557-1-philmd@linaro.org>
[thuth: Fix some warnings from checkpatch.pl along the way]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agoMakefile: allow 'make uninstall'
Peter Maydell [Tue, 10 Jan 2023 15:12:50 +0000 (15:12 +0000)]
Makefile: allow 'make uninstall'

Meson supports an "uninstall", so we can easily allow it to work by
not suppressing the forwarding of it from Make to meson.

We originally suppressed this because Meson's 'uninstall' has a hole
in it: it will remove everything that is installed by a mechanism
meson knows about, but not things installed by "custom install
scripts", and there is no "custom uninstall script" mechanism.

For QEMU, though, the only thing that was being installed by a custom
install script was the LC_MESSAGES files handled by Meson's i18n
module, and that code was fixed in Meson commit 487d45c1e5bfff0fbdb4,
which is present in Meson 0.60.0 and later.  Since we already require
a Meson version newer than that, we're now safe to enable
'uninstall', as it will now correctly uninstall everything that was
installed.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/109
Message-Id: <20230110151250.24434-1-peter.maydell@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agoUpgrade all packages in the FreeBSD VMs to ensure the freshness
Li-Wen Hsu [Mon, 9 Jan 2023 20:32:01 +0000 (04:32 +0800)]
Upgrade all packages in the FreeBSD VMs to ensure the freshness

This (hopefully) fixes the errors that we currently see in the
FreeBSD jobs in the gitlab CI:

 ld-elf.so.1: /usr/local/bin/bash: Undefined symbol "rl_set_timeout"

Signed-off-by: Li-Wen Hsu <lwhsu@lwhsu.org>
Message-Id: <CAKBkRUwxL1fkzwpK_2FXKGE31415JRAR8N09+O_ht8CNdfVAqQ@mail.gmail.com>
[thuth: Update subject and patch description]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2 years agotcg/riscv: Implement direct branch for goto_tb
Richard Henderson [Sun, 27 Nov 2022 09:11:56 +0000 (01:11 -0800)]
tcg/riscv: Implement direct branch for goto_tb

Now that tcg can handle direct and indirect goto_tb simultaneously,
we can optimistically leave space for a direct branch and fall back
to loading the pointer from the TB for an indirect branch.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/riscv: Introduce OPC_NOP
Richard Henderson [Sun, 27 Nov 2022 09:07:25 +0000 (01:07 -0800)]
tcg/riscv: Introduce OPC_NOP

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/arm: Implement direct branch for goto_tb
Richard Henderson [Sun, 27 Nov 2022 08:48:47 +0000 (00:48 -0800)]
tcg/arm: Implement direct branch for goto_tb

Now that tcg can handle direct and indirect goto_tb
simultaneously, we can optimistically leave space for
a direct branch and fall back to loading the pointer
from the TB for an indirect branch.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/sparc64: Reorg goto_tb implementation
Richard Henderson [Tue, 6 Dec 2022 00:05:06 +0000 (18:05 -0600)]
tcg/sparc64: Reorg goto_tb implementation

The old sparc64 implementation may replace two insns, which leaves
a race condition in which a thread could be stopped at a PC in the
middle of the sequence, and when restarted does not see the complete
address computation and branches to nowhere.

The new implemetation replaces only one insn, swapping between a
direct branch and a direct call.  The TCG_REG_TB register is loaded
from tb->jmp_target_addr[] in the delay slot.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/sparc64: Remove USE_REG_TB
Richard Henderson [Sun, 27 Nov 2022 05:34:00 +0000 (08:34 +0300)]
tcg/sparc64: Remove USE_REG_TB

This is always true for sparc64, so this is dead since 3a5f6805c7ca.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/ppc: Reorg goto_tb implementation
Richard Henderson [Mon, 5 Dec 2022 23:45:02 +0000 (17:45 -0600)]
tcg/ppc: Reorg goto_tb implementation

The old ppc64 implementation replaces 2 or 4 insns, which leaves a race
condition in which a thread could be stopped at a PC in the middle of
the sequence, and when restarted does not see the complete address
computation and branches to nowhere.

The new implemetation replaces only one insn, swapping between

b       <dest>
and
mtctr r31

falling through to a general-case indirect branch.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/aarch64: Reorg goto_tb implementation
Richard Henderson [Mon, 5 Dec 2022 23:26:23 +0000 (17:26 -0600)]
tcg/aarch64: Reorg goto_tb implementation

The old implementation replaces two insns, swapping between

b <dest>
nop
br x30
and
adrp x30, <dest>
addi x30, x30, lo12:<dest>
br x30

There is a race condition in which a thread could be stopped at
the PC of the second insn, and when restarted does not see the
complete address computation and branches to nowhere.

The new implemetation replaces only one insn, swapping between

b <dest>
br tmp
and
ldr tmp, <jmp_addr>
br tmp

Reported-by: hev <r@hev.cc>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Remove TCG_TARGET_HAS_direct_jump
Richard Henderson [Mon, 5 Dec 2022 22:55:40 +0000 (16:55 -0600)]
tcg: Remove TCG_TARGET_HAS_direct_jump

We now have the option to generate direct or indirect
goto_tb depending on the dynamic displacement, thus
the define is no longer necessary or completely accurate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Always define tb_target_set_jmp_target
Richard Henderson [Mon, 5 Dec 2022 22:43:18 +0000 (16:43 -0600)]
tcg: Always define tb_target_set_jmp_target

Install empty versions for !TCG_TARGET_HAS_direct_jump hosts.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Move tb_target_set_jmp_target declaration to tcg.h
Richard Henderson [Mon, 5 Dec 2022 22:34:03 +0000 (16:34 -0600)]
tcg: Move tb_target_set_jmp_target declaration to tcg.h

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Change tb_target_set_jmp_target arguments
Richard Henderson [Mon, 5 Dec 2022 17:31:20 +0000 (11:31 -0600)]
tcg: Change tb_target_set_jmp_target arguments

Replace 'tc_ptr' and 'addr' with 'tb' and 'n'.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Add TranslationBlock.jmp_insn_offset
Richard Henderson [Sun, 27 Nov 2022 02:54:23 +0000 (18:54 -0800)]
tcg: Add TranslationBlock.jmp_insn_offset

Stop overloading jmp_target_arg for both offset and address,
depending on TCG_TARGET_HAS_direct_jump.  Instead, add a new
field to hold the jump insn offset and always set the target
address in jmp_target_addr[].  This will allow a tcg backend
to use either direct or indirect depending on displacement.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Add gen_tb to TCGContext
Richard Henderson [Sun, 27 Nov 2022 02:39:55 +0000 (18:39 -0800)]
tcg: Add gen_tb to TCGContext

This can replace four other variables that are references
into the TranslationBlock structure.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID
Richard Henderson [Sun, 27 Nov 2022 02:20:57 +0000 (18:20 -0800)]
tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID

This will shortly be used for more than reset.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Split out tcg_out_goto_tb
Richard Henderson [Sun, 27 Nov 2022 01:14:05 +0000 (17:14 -0800)]
tcg: Split out tcg_out_goto_tb

The INDEX_op_goto_tb opcode needs no register allocation.
Split out a dedicated helper function for it.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Introduce get_jmp_target_addr
Richard Henderson [Sun, 27 Nov 2022 01:42:11 +0000 (17:42 -0800)]
tcg: Introduce get_jmp_target_addr

Similar to the existing set_jmp_reset_offset.  Include the
rw->rx address space conversion done by arm and s390x, and
forgotten by mips and riscv.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Introduce set_jmp_insn_offset
Richard Henderson [Sat, 26 Nov 2022 23:18:44 +0000 (15:18 -0800)]
tcg: Introduce set_jmp_insn_offset

Similar to the existing set_jmp_reset_offset.  Move any assert for
TCG_TARGET_HAS_direct_jump into the new function (which now cannot
be build-time).  Will be unused if TCG_TARGET_HAS_direct_jump is
constant 0, but we can't test for constant in the preprocessor,
so just mark it G_GNUC_UNUSED.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Replace asserts on tcg_jmp_insn_offset
Richard Henderson [Sat, 26 Nov 2022 23:09:00 +0000 (15:09 -0800)]
tcg: Replace asserts on tcg_jmp_insn_offset

Test TCG_TARGET_HAS_direct_jump instead of testing an
implementation pointer.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/sparc64: Remove unused goto_tb code for indirect jump
Richard Henderson [Sat, 26 Nov 2022 23:05:37 +0000 (15:05 -0800)]
tcg/sparc64: Remove unused goto_tb code for indirect jump

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/ppc: Remove unused goto_tb code for indirect jump
Richard Henderson [Sat, 26 Nov 2022 23:05:01 +0000 (15:05 -0800)]
tcg/ppc: Remove unused goto_tb code for indirect jump

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg/i386: Remove unused goto_tb code for indirect jump
Richard Henderson [Sat, 26 Nov 2022 23:04:26 +0000 (15:04 -0800)]
tcg/i386: Remove unused goto_tb code for indirect jump

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: Split out tcg_out_exit_tb
Richard Henderson [Sat, 26 Nov 2022 20:42:06 +0000 (12:42 -0800)]
tcg: Split out tcg_out_exit_tb

The INDEX_op_exit_tb opcode needs no register allocation.
Split out a dedicated helper function for it.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agoMerge tag 'pull-tpm-2023-01-17-1' of https://github.com/stefanberger/qemu-tpm into...
Peter Maydell [Tue, 17 Jan 2023 15:47:53 +0000 (15:47 +0000)]
Merge tag 'pull-tpm-2023-01-17-1' of https://github.com/stefanberger/qemu-tpm into staging

Merge tpm 2023/01/17 v1

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# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown]
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* tag 'pull-tpm-2023-01-17-1' of https://github.com/stefanberger/qemu-tpm:
  tests/qtest/tpm-emu: Avoid hangs using abort handlers closing channels
  tests/qtest: Poll on waitpid() for a while before sending SIGKILL

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge tag 'pull-tcg-20230116' of https://gitlab.com/rth7680/qemu into staging
Peter Maydell [Tue, 17 Jan 2023 10:24:15 +0000 (10:24 +0000)]
Merge tag 'pull-tcg-20230116' of https://gitlab.com/rth7680/qemu into staging

- Reorg cpu_tb_exec around setjmp.
- Use __attribute__((target)) for buffer_is_zero.
- Add perfmap and jitdump for perf support.

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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20230116' of https://gitlab.com/rth7680/qemu:
  accel/tcg: Split out cpu_exec_{setjmp,loop}
  util/bufferiszero: Use __attribute__((target)) for avx2/avx512
  tcg: add perfmap and jitdump
  accel/tcg: Add debuginfo support
  linux-user: Clean up when exiting due to a signal

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agohw/ssi/sifive_spi.c: spelling: reigster
Michael Tokarev [Sat, 5 Nov 2022 11:53:29 +0000 (14:53 +0300)]
hw/ssi/sifive_spi.c: spelling: reigster

Fixes: 0694dabe9763847f3010b54ab3ec7d367d2f0ff0
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Message-Id: <20221105115329.306527-1-mjt@msgid.tls.msk.ru>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/cxl/cxl-host: Fix an error message typo
Hoa Nguyen [Sun, 27 Nov 2022 03:22:20 +0000 (19:22 -0800)]
hw/cxl/cxl-host: Fix an error message typo

Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221127032220.2649-1-hoanguyen@ucdavis.edu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotests/qtest/tpm-emu: Avoid hangs using abort handlers closing channels
Stefan Berger [Wed, 11 Jan 2023 13:45:47 +0000 (08:45 -0500)]
tests/qtest/tpm-emu: Avoid hangs using abort handlers closing channels

Install abort handlers that close the TPM control and data channels in
case an abort occurs. The purpose of this is to have QEMU terminate
under abnormal test case failures to resolve intermittent hangs on s390x
hosts running TPM tests for QEMU/x86_64.

Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id: 20230111134547.3959604-1-stefanb@linux.ibm.com

2 years agotests/qtest: Poll on waitpid() for a while before sending SIGKILL
Stefan Berger [Thu, 12 Jan 2023 14:34:13 +0000 (09:34 -0500)]
tests/qtest: Poll on waitpid() for a while before sending SIGKILL

To prevent getting stuck on waitpid() in case the target process does
not terminate on SIGTERM, poll on waitpid() for 30s and if the target
process has not changed state until then send a SIGKILL to it.

Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-id: 20230112143413.3979057-1-stefanb@linux.ibm.com
[PMM: changed TFR to RETRY_ON_EINTR]

2 years agoaccel/tcg: Split out cpu_exec_{setjmp,loop}
Richard Henderson [Sat, 7 Jan 2023 18:12:51 +0000 (10:12 -0800)]
accel/tcg: Split out cpu_exec_{setjmp,loop}

Recently the g_assert(cpu == current_cpu) test has been
intermittently failing with gcc.  Reorg the code around
the setjmp to minimize the lifetime of the cpu variable
affected by the setjmp.

This appears to fix the existing issue with clang as well.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1147
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agoutil/bufferiszero: Use __attribute__((target)) for avx2/avx512
Richard Henderson [Sun, 4 Dec 2022 01:31:12 +0000 (19:31 -0600)]
util/bufferiszero: Use __attribute__((target)) for avx2/avx512

Use the attribute, which is supported by clang, instead of
the #pragma, which is not supported and, for some reason,
also not detected by the meson probe, so we fail by -Werror.

Include only <immintrin.h> as that is the outermost "official"
header for these intrinsics -- emmintrin.h and smmintrin -- are
older SSE2 and SSE4 specific headers, while the immintrin.h
includes all of the Intel intrinsics.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agotcg: add perfmap and jitdump
Ilya Leoshkevich [Thu, 12 Jan 2023 15:20:13 +0000 (16:20 +0100)]
tcg: add perfmap and jitdump

Add ability to dump /tmp/perf-<pid>.map and jit-<pid>.dump.
The first one allows the perf tool to map samples to each individual
translation block. The second one adds the ability to resolve symbol
names, line numbers and inspect JITed code.

Example of use:

    perf record qemu-x86_64 -perfmap ./a.out
    perf report

or

    perf record -k 1 qemu-x86_64 -jitdump ./a.out
    DEBUGINFOD_URLS= perf inject -j -i perf.data -o perf.data.jitted
    perf report -i perf.data.jitted

Co-developed-by: Vanderson M. do Rosario <vandersonmr2@gmail.com>
Co-developed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230112152013.125680-4-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agoaccel/tcg: Add debuginfo support
Ilya Leoshkevich [Thu, 12 Jan 2023 15:20:12 +0000 (16:20 +0100)]
accel/tcg: Add debuginfo support

Add libdw-based functions for loading and querying debuginfo. Load
debuginfo from the system and the linux-user loaders.

This is useful for the upcoming perf support, which can then put
human-readable guest symbols instead of raw guest PCs into perfmap and
jitdump files.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230112152013.125680-3-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agolinux-user: Clean up when exiting due to a signal
Ilya Leoshkevich [Thu, 12 Jan 2023 15:20:11 +0000 (16:20 +0100)]
linux-user: Clean up when exiting due to a signal

When exiting due to an exit() syscall, qemu-user calls
preexit_cleanup(), but this is currently not the case when exiting due
to a signal. This leads to various buffers not being flushed (e.g.,
for gprof, for gcov, and for the upcoming perf support).

Add the missing call.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112152013.125680-2-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2 years agohw/cxl/cxl-cdat.c: spelling: missmatch
Michael Tokarev [Thu, 15 Dec 2022 12:37:49 +0000 (15:37 +0300)]
hw/cxl/cxl-cdat.c: spelling: missmatch

Introduced by: aba578bdace5303a441f8a37aad781b5cb06f38c

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221215123749.1026775-1-mjt@msgid.tls.msk.ru>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/pvrdma: Protect against buggy or malicious guest driver
Yuval Shaia [Sun, 3 Apr 2022 09:52:34 +0000 (12:52 +0300)]
hw/pvrdma: Protect against buggy or malicious guest driver

Guest driver might execute HW commands when shared buffers are not yet
allocated.
This could happen on purpose (malicious guest) or because of some other
guest/host address mapping error.
We need to protect againts such case.

Fixes: CVE-2022-1050
Reported-by: Raven <wxhusst@gmail.com>
Signed-off-by: Yuval Shaia <yuval.shaia.ml@gmail.com>
Message-Id: <20220403095234.2210-1-yuval.shaia.ml@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoccid-card-emulated: fix cast warning/error
Marc-André Lureau [Tue, 3 Jan 2023 11:08:05 +0000 (15:08 +0400)]
ccid-card-emulated: fix cast warning/error

../hw/usb/ccid-card-emulated.c: In function 'handle_apdu_thread':
../hw/usb/ccid-card-emulated.c:251:24: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
  251 |                 assert((unsigned long)event > 1000);

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230103110814.3726795-2-marcandre.lureau@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/i386/pc: Remove unused 'owner' argument from pc_pci_as_mapping_init
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 17:38:26 +0000 (18:38 +0100)]
hw/i386/pc: Remove unused 'owner' argument from pc_pci_as_mapping_init

This argument was added 9 years ago in commit 83d08f2673
("pc: map PCI address space as catchall region for not mapped
addresses") and has never been used since, so remove it.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20230105173826.56748-1-philmd@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotests/qtest/test-hmp: Improve the check for verbose mode
Thomas Huth [Mon, 9 Jan 2023 10:13:06 +0000 (11:13 +0100)]
tests/qtest/test-hmp: Improve the check for verbose mode

Running the test-hmp with V=2 up to V=9 runs the test in verbose mode,
but running for example with V=10 falls back to non-verbose mode ...
Improve this oddity by properly treating the argument as a number.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230109101306.271444-1-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/usb: Mark the XLNX_VERSAL-related files as target-independent
Thomas Huth [Thu, 12 Jan 2023 13:49:28 +0000 (14:49 +0100)]
hw/usb: Mark the XLNX_VERSAL-related files as target-independent

Seems like there is nothing target-specific in here, so these files
can be moved to softmmu_ss to avoid that they get compiled twice
(once for qemu-system-arm and once for qemu-system-aarch64).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-8-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/intc: Mark more interrupt-controller files as target independent
Thomas Huth [Thu, 12 Jan 2023 13:49:27 +0000 (14:49 +0100)]
hw/intc: Mark more interrupt-controller files as target independent

Seems like there is also nothing target-specific in here, so these
files can be moved to softmmu_ss to avoid that they get compiled
twice (once for qemu-system-arm and once for qemu-system-aarch64).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-7-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoMerge tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k into staging
Peter Maydell [Mon, 16 Jan 2023 16:55:30 +0000 (16:55 +0000)]
Merge tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k into staging

M68K pull request 20230116

fix FPSR quotient byte

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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 16 Jan 2023 09:18:35 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k:
  target/m68k: fix FPSR quotient byte for frem instruction
  target/m68k: fix FPSR quotient byte for fmod instruction
  target/m68k: pass sign directly into make_quotient()
  target/m68k: pass quotient directly into make_quotient()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agohw/cpu: Mark arm11 and realview mpcore as target-independent code
Thomas Huth [Thu, 12 Jan 2023 13:49:26 +0000 (14:49 +0100)]
hw/cpu: Mark arm11 and realview mpcore as target-independent code

Seems like there is nothing target-specific in here, so these files
can be moved to softmmu_ss to avoid that they get compiled twice
(once for qemu-system-arm and once for qemu-system-aarch64).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-6-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/arm: Move various units to softmmu_ss[]
Philippe Mathieu-Daudé [Thu, 12 Jan 2023 13:49:25 +0000 (14:49 +0100)]
hw/arm: Move various units to softmmu_ss[]

arm_ss[] units are built twice: once for 32-bit word size and
once for 64-bit. The following units don't require any word
size knowledge and can be moved to softmmu_ss[] (where they
are built once):

 - smmu-common.c
 - exynos4_boards.c
 - bcm2835_peripherals.c
 - tosa.c

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230110164406.94366-2-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-5-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/tpm: Move tpm_ppi.c out of target-specific source set
Philippe Mathieu-Daudé [Thu, 12 Jan 2023 13:49:24 +0000 (14:49 +0100)]
hw/tpm: Move tpm_ppi.c out of target-specific source set

The TPM Physical Presence Interface is not target specific.
Build this file once for all targets.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221209170042.71169-4-philmd@linaro.org>
[thuth: Drop the CONFIG_SOFTMMU statements, they are not needed here]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-4-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/intc: Move some files out of the target-specific source set
Philippe Mathieu-Daudé [Thu, 12 Jan 2023 13:49:23 +0000 (14:49 +0100)]
hw/intc: Move some files out of the target-specific source set

The Goldfish interrupt controller is not target specific.

While the Exynos interrupt combiner is only used by the ARM
targets, we can build this device once for all.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221209170042.71169-3-philmd@linaro.org>
[thuth: Change patch title, and also move 'exynos4210_gic.c']
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-3-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agohw/display: Move omap_lcdc.c out of target-specific source set
Philippe Mathieu-Daudé [Thu, 12 Jan 2023 13:49:22 +0000 (14:49 +0100)]
hw/display: Move omap_lcdc.c out of target-specific source set

While only used by the ARM targets, this device can be built
once for all.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221209170042.71169-2-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230112134928.1026006-2-thuth@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoCall qemu_socketpair() instead of socketpair() when possible
Guoyi Tu [Mon, 16 Jan 2023 04:56:00 +0000 (12:56 +0800)]
Call qemu_socketpair() instead of socketpair() when possible

As qemu_socketpair() was introduced in commit 3c63b4e9
("oslib-posix: Introduce qemu_socketpair()"), it's time
to replace the other existing socketpair() calls with
qemu_socketpair() if possible

Signed-off-by: Guoyi Tu <tugy@chinatelecom.cn>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <cd28916a-f1f3-b54e-6ade-8a3647c3a9a5@chinatelecom.cn>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotests/qtest/qom-test: Do not print tested properties by default
Thomas Huth [Thu, 15 Dec 2022 15:30:36 +0000 (16:30 +0100)]
tests/qtest/qom-test: Do not print tested properties by default

We're still running into the problem that some logs are cut in the
gitlab-CI since they got too big. The biggest part of the log is
still the output of the qom-test. Let's stop printing the properties
by default to get to a saner size here. The full output can still
be enabled by setting V=2 (or higher) in the environment.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221215153036.422362-1-thuth@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agoMerge tag 'mips-20230113' of https://github.com/philmd/qemu into staging
Peter Maydell [Mon, 16 Jan 2023 11:24:11 +0000 (11:24 +0000)]
Merge tag 'mips-20230113' of https://github.com/philmd/qemu into staging

MIPS patches queue

A bunch of cleanups from various people.

- Improved GT64120 on big-endian hosts
- GT64120 north bridge and MC146818 RTC devices are now target independent
- Bonito64 north bridge converted to 3-phase reset API
- PCI refactors around PIIX devices
- Support for nanoMIPS in bootloader generator API
- New YAMON Malta Avocado test
- Removal of 'trap and emulate' KVM support
- System-specific QMP commands restricted to system emulation

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# gpg: Signature made Fri 13 Jan 2023 15:35:28 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* tag 'mips-20230113' of https://github.com/philmd/qemu: (46 commits)
  scripts/git.orderfile: Display MAINTAINERS changes first
  target/mips: Restrict 'qapi-commands-machine.h' to system emulation
  hw/mips/boston: Rename MachineState 'mc' pointer to 'ms'
  hw/pci-host/bonito: Declare TYPE_BONITO_PCI_HOST_BRIDGE in header
  hw/pci-host/bonito: Use 'bonito_pci' for PCI function #0 code
  hw/pci-host/bonito: Use 'bonito_host' for PCI host bridge code
  hw/pci-host/bonito: Convert to 3-phase reset
  softmmu/rtc: Emit warning when using driftfix=slew on systems without mc146818
  hw/rtc/mc146818rtc: Make the mc146818 RTC device target independent
  hw/core/qdev-properties-system: Allow the 'slew' policy only on x86
  hw/intc: Extract the IRQ counting functions into a separate file
  hw/intc/i8259: Make using the isa_pic singleton more type-safe
  hw/usb/hcd-uhci: Introduce TYPE_ defines for device models
  hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig
  hw/isa/piix4: Decouple INTx-to-LNKx routing which is board-specific
  hw/isa/piix3: Decouple INTx-to-LNKx routing which is board-specific
  hw/pci/pci: Factor out pci_bus_map_irqs() from pci_bus_irqs()
  hw/pci/pci_host: Trace config accesses on unexisting functions
  mips: Always include nanomips disassembler
  mips: Remove support for trap and emulate KVM
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 years agotarget/m68k: fix FPSR quotient byte for frem instruction
Mark Cave-Ayland [Sat, 14 Jan 2023 23:29:59 +0000 (23:29 +0000)]
target/m68k: fix FPSR quotient byte for frem instruction

The FPSR quotient byte should be set to the value of the quotient and not the
result. Manually calculate the quotient in the frem helper in round to nearest
even mode (note this is different from the quotient calculated internally for
fmod), and use it to set the quotient byte accordingly.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1314
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230114232959.118224-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotarget/m68k: fix FPSR quotient byte for fmod instruction
Mark Cave-Ayland [Sat, 14 Jan 2023 23:29:58 +0000 (23:29 +0000)]
target/m68k: fix FPSR quotient byte for fmod instruction

The FPSR quotient byte should be set to the value of the quotient and not the
result. Switch from using floatx80_mod() to floatx80_modrem() which returns
the quotient as a uint64_t which can be used for the quotient byte.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230114232959.118224-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotarget/m68k: pass sign directly into make_quotient()
Mark Cave-Ayland [Sat, 14 Jan 2023 23:29:57 +0000 (23:29 +0000)]
target/m68k: pass sign directly into make_quotient()

This enables the quotient parameter to be changed from int32_t to uint32_t and
also allows the extra sign logic in make_quotient() to be removed.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20230114232959.118224-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agotarget/m68k: pass quotient directly into make_quotient()
Mark Cave-Ayland [Sat, 14 Jan 2023 23:29:56 +0000 (23:29 +0000)]
target/m68k: pass quotient directly into make_quotient()

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230114232959.118224-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2 years agoscripts/git.orderfile: Display MAINTAINERS changes first
Philippe Mathieu-Daudé [Fri, 16 Dec 2022 08:42:09 +0000 (09:42 +0100)]
scripts/git.orderfile: Display MAINTAINERS changes first

If we get custom to see MAINTAINERS changes first,
we might catch missing MAINTAINERS updates easier.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221216225505.26052-1-philmd@linaro.org>

2 years agotarget/mips: Restrict 'qapi-commands-machine.h' to system emulation
Philippe Mathieu-Daudé [Mon, 19 Dec 2022 11:14:46 +0000 (12:14 +0100)]
target/mips: Restrict 'qapi-commands-machine.h' to system emulation

Since commit a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.

Extract the QMP functions from cpu.c (which is always compiled) to
the new 'sysemu/mips-qmp-cmds.c' unit (which is only compiled when
system emulation is selected).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221219211034.70491-4-philmd@linaro.org>

2 years agohw/mips/boston: Rename MachineState 'mc' pointer to 'ms'
Daniel Henrique Barboza [Wed, 11 Jan 2023 17:21:33 +0000 (14:21 -0300)]
hw/mips/boston: Rename MachineState 'mc' pointer to 'ms'

Follow the QEMU convention of naming MachineState pointers as 'ms' by
renaming the instance in create_fdt() where we're calling it 'mc'.

Cc: Paul Burton <paulburton@kernel.org>
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20230111172133.334735-1-dbarboza@ventanamicro.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/pci-host/bonito: Declare TYPE_BONITO_PCI_HOST_BRIDGE in header
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 12:48:08 +0000 (13:48 +0100)]
hw/pci-host/bonito: Declare TYPE_BONITO_PCI_HOST_BRIDGE in header

Declare the TYPE_BONITO_PCI_HOST_BRIDGE QOM type in a
header to be able to access it from board code.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230105130710.49264-8-philmd@linaro.org>

2 years agohw/pci-host/bonito: Use 'bonito_pci' for PCI function #0 code
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 10:48:34 +0000 (11:48 +0100)]
hw/pci-host/bonito: Use 'bonito_pci' for PCI function #0 code

To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito* as bonito_pci*.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230105130710.49264-4-philmd@linaro.org>

2 years agohw/pci-host/bonito: Use 'bonito_host' for PCI host bridge code
Philippe Mathieu-Daudé [Thu, 5 Jan 2023 10:47:04 +0000 (11:47 +0100)]
hw/pci-host/bonito: Use 'bonito_host' for PCI host bridge code

To make it easier to differentiate between the Host Bridge
object and its PCI function #0, rename bonito_pcihost* as
bonito_host*.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230105130710.49264-3-philmd@linaro.org>

2 years agohw/pci-host/bonito: Convert to 3-phase reset
Philippe Mathieu-Daudé [Thu, 26 Sep 2019 13:42:11 +0000 (15:42 +0200)]
hw/pci-host/bonito: Convert to 3-phase reset

Convert the TYPE_PCI_BONITO class to use 3-phase reset.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230105130710.49264-2-philmd@linaro.org>

2 years agosoftmmu/rtc: Emit warning when using driftfix=slew on systems without mc146818
Thomas Huth [Tue, 10 Jan 2023 09:53:51 +0000 (10:53 +0100)]
softmmu/rtc: Emit warning when using driftfix=slew on systems without mc146818

The 'slew' lost tick policy is only available on systems with a mc146818
RTC. On other systems, "-rtc driftfix=slew" is currently silently ignored.
Let's emit at least a warning in this case to make the users aware that
there is something wrong in their command line settings.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20230110095351.611724-5-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/rtc/mc146818rtc: Make the mc146818 RTC device target independent
Thomas Huth [Tue, 10 Jan 2023 09:53:50 +0000 (10:53 +0100)]
hw/rtc/mc146818rtc: Make the mc146818 RTC device target independent

The only reason for this code being target dependent was the IRQ-counting
related code in rtc_policy_slew_deliver_irq(). Since these functions have
been moved into a new, separate file (kvm_irqcount.c) which is now always
compiled and linked if necessary, we can get rid of the #ifdef TARGET_I386
switches in mc146818rtc.c and declare it in the softmmu_ss instead of
specific_ss, so that the code only gets compiled once for all targets.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20230110095351.611724-4-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/core/qdev-properties-system: Allow the 'slew' policy only on x86
Thomas Huth [Tue, 10 Jan 2023 09:53:49 +0000 (10:53 +0100)]
hw/core/qdev-properties-system: Allow the 'slew' policy only on x86

The 'slew' tick policy is currently enforced to be only available on
x86 via some "#ifdef TARGET_I386" statements in mc146818rtc.c. We
want to get rid of those #ifdefs, so we need a different way of
checking whether the policy is allowed or not. Using the setter
function in hw/core/qdev-properties-system.c seems to be a good
place, so let's add a check here.

Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20230110095351.611724-3-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/intc: Extract the IRQ counting functions into a separate file
Thomas Huth [Tue, 10 Jan 2023 09:53:48 +0000 (10:53 +0100)]
hw/intc: Extract the IRQ counting functions into a separate file

These IRQ counting functions will soon be required in binaries that
do not include the APIC code, too, so let's extract them into a
separate file that can be linked independently of the APIC code.

While we're at it, change the apic_* prefix into kvm_* since the
functions are used from the i8259 PIC (i.e. not the APIC), too.

Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20230110095351.611724-2-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/intc/i8259: Make using the isa_pic singleton more type-safe
Bernhard Beschow [Mon, 9 Jan 2023 17:23:22 +0000 (18:23 +0100)]
hw/intc/i8259: Make using the isa_pic singleton more type-safe

This even spares some casts in hot code paths along the way.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230109172347.1830-10-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/usb/hcd-uhci: Introduce TYPE_ defines for device models
Bernhard Beschow [Mon, 9 Jan 2023 17:23:21 +0000 (18:23 +0100)]
hw/usb/hcd-uhci: Introduce TYPE_ defines for device models

Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20221204190553.3274-7-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 years agohw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig
Bernhard Beschow [Mon, 9 Jan 2023 17:23:20 +0000 (18:23 +0100)]
hw/mips/Kconfig: Track Malta's PIIX dependencies via Kconfig

Tracking dependencies via Kconfig seems much cleaner.

Note that PIIX4 already depends on ACPI_PIIX4.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230109172347.1830-8-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>