Matthew Leach [Thu, 23 Jan 2014 17:29:27 +0000 (17:29 +0000)]
Add a PSCI configure option
The boot-wrapper can be build with or without support for
PSCI. Therefore add that as a configure option (which defaults to not
using PSCI) and set the appropriate options in the makefile.
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
[Mark: fix indentation] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Matthew Leach [Thu, 23 Jan 2014 17:29:26 +0000 (17:29 +0000)]
Add autotools configuration.
This patch adds a basic auto-tools configuration environment for the
bootwrapper consisting of the configure.ac file and the Makefile.am
file.
The configure.ac file includes several options and checks:
- Ensure that an AArch64 compiler is used.
- Add the mandatory --with-kernel-dir option that sets KERN_DIR.
- Check that the correct base dtb file exists in KERN_DIR.
- Add an option, --with-initrd, that allows a user to specify an
initrd file to embed in the image.
- Check for a working dtc and set DTC to the full-path to the
executable.
- Create the necessary symbolic links to the relevant kernel files.
The Makefile.am file includes several changes:
- Use a prebuilt dtb rather than a dts, which is decompiled to inject
the chosen node.
- Use the configured compiler tool names.
- Use the configured SED program rather than assuming it is in PATH.
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
[Mark: use dtb, add options, fix style issues, remove src/] Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 11 Feb 2013 16:58:18 +0000 (16:58 +0000)]
Add simple PSCI implementation
This patch adds a simple PSCI implementation, only supporting CPU_ON and
CPU_OFF. As this does not communicate with any hardware power controller
(yet), CPUs spin in an internal pen, with a wfe to limit their polling
speed.
While the model brings up CPUs with caches invalidated, we enable caches
and the MMU to allow the use of exclusive operations in the bootwrapper,
and thus the cache may allocate entries while in EL3. As PSCI requires
that caches are invalid when executing from a CPU_ON entry point, the
caches must be cleaned and invalided when we drop to EL2. This cleaning
is performed in a shim in EL2 as this is simpler than enabling/disabling
caches and the MMU on each SMC.
The list of all CPU IDs (MPIDRS with non-aff bits masked out) in the
system must be provided in the Makefile as the comma-separated list
CPU_IDs, to enable the bootwrapper to differentiate CPUs and provide the
correct error messages if for example the OS attempts to power on a CPU
multiple times. If this list does not match the CPUs present, it may not
be possible to bring some CPUs online, and the PSCI implementation may
erroneously acknowledge power on requests for non-existent CPUs.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Tue, 23 Apr 2013 13:50:14 +0000 (14:50 +0100)]
Add code to clean and invalidate caches
Linux expects to be handed a system with caches disabled and
invalidated. While the model currently brings CPUs up with caches
invalidated, we'll need to invalidate caches when leaving the
bootwrapper if we enable them within the bootwrapper (e.g. for the use
of exclusive operations), as lines may be allocated.
This patch adds code to invalidate the dcaches and icaches. It is not
yet called.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 11 Feb 2013 16:24:17 +0000 (16:24 +0000)]
Factor spin-table into its own file
This patch factors out the spin-table boot protocol into its own file,
leaving boot.S to do all of the required EL3 initialisation, and calling
upon ns_init to perform EL2 initialisation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Thu, 25 Apr 2013 15:02:09 +0000 (16:02 +0100)]
Factor out secure GIC initialisation
Currently the bootwrapper still lumps together logically distinct pieces
of hardware initialisation, making porting to new platforms or adding
new features difficult. It would be nicer if we could separate some of
the functional units to make the code clearer and easier to extend.
To this end, this patch factors the secure GIC initialisation into its
own file. Additionally, the code is modified to route all interrupts to
the non-secure side, not just the first 64.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 11 Feb 2013 14:38:22 +0000 (14:38 +0000)]
Factor non-secure system initialisation
When we add PSCI, we'll want to share the same non-secure sysetem
initialisation code. As we're going to want to put spin-table and PSCI
implementations in separate files, it would be nice to have the
initialisation code in its own file, to make clear the separation
between early boot, platform interface code, and non-secure system
initialisation.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Thu, 16 May 2013 10:07:41 +0000 (11:07 +0100)]
Test all MPIDR affinity bits
Currently we only test the Aff0 bits of the MPIDR to determine the
'primary' CPU. In multi-cluster systems, MPIDR.Aff{3,2,1} may not be
zero, and there may by multiple CPUs where MPIDR.Aff0 is zero. In these
systems we might determine that two cpus are the primary CPU.
This patch adds a MPIDR_ID_BITS mask, and uses it in all cases we test
the MPIDR, making this safe for multi-cluster systems. This doesn't
bring full support for multi-cluster systems, however, as they may
require additional hardware to be set up (e.g. CCI).
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 11 Feb 2013 14:25:33 +0000 (14:25 +0000)]
Allow support of multiple assembly files
To support more complex functionality, it would be nice if we could
separate bits of the boot code into separate files.
This patch refactors the Makefile, allowing us to add more source files
later without having to add a new rule for each file. The defines we
pass to each object are also factored into separate lines for easier
modification in future.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Tue, 5 Feb 2013 17:27:46 +0000 (17:27 +0000)]
Move EL drop definition out of boot.S
PSCI needs to be able to drop cores to EL2 repeatedly, and it doesn't
make sense to always throw CPUs through the original boot path.
This patch changes the EL drop into a macro, and moves it to a common
file that can be used by different boot protocol / service
implementations. While doing so, the SPSR value used is split out to be
more legible.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 11 Feb 2013 16:58:54 +0000 (16:58 +0000)]
gitignore: ignore build files
Currently. we don't ignore several files produced during the build in
the .gitignore, which can make the output of git status very noisy.
Let's ignore all of the external dependencies we might add to the source
directory (dtc, *.dts{i,}, *.cpio.gz), and all of the files we'll
produce during the build (*.o, *.axf). Ignoring the general case of all
of these files should produce less churn in .gitignore in future, and we
can always add special exemptions if required.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Mon, 7 Jan 2013 13:50:44 +0000 (13:50 +0000)]
Use immediate offsets rather than post-increment
When we set the GICD_IGROUPRn registers, we have a dangling
post-increment at the end which is never useful, being overwritten in
every path. As we're only writing to 3 registers, the offsets of which
can be represented in immediates, use movs with immediate offsets to
perform the writes.
Reported-by: Nigel Stephens <nigel.stephens@arm.com> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Mark Rutland [Thu, 20 Dec 2012 16:52:51 +0000 (16:52 +0000)]
Remove unnecessary ldr from boot wrapper
We currently do an ldr from GICC_CTLR to w0, then immediately overwrite
w0 with a mov. Reading the GICC_CTLR has no effect on the state of the
GIC, so there's no reason to do the ldr. It's also inconsistent with the
way we set the GICD_CTLR.
Fix this.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Catalin Marinas [Fri, 4 Jan 2013 13:06:31 +0000 (13:06 +0000)]
Enable the CLCD output
This patch is to avoid setting the MUXFPGA configuration in the platform
code in the kernel. On real hardware, this function is handled by the
boot monitor.
Catalin Marinas [Wed, 2 Dec 2009 12:26:48 +0000 (12:26 +0000)]
Initial version of the AArch64 Linux boot wrapper
This boot wrapper contains the code for initialising the ARMv8 software
model before the Linux kernel can run (see
Documentation/arm64/booting.txt in the kernel tree for the Linux booting
requirements).
Running "make" creates a "linux-system.axf" ELF file that can be loaded
by the software model.
projects / people / julieng / boot-wrapper-aarch64.git / log