Jan Beulich [Fri, 23 Aug 2013 13:05:39 +0000 (15:05 +0200)]
credit2: replace cpumask_first() uses
... with cpumask_any() or cpumask_cycle().
In one case this also allows elimination of a cpumask_empty() call,
and while doing this I also spotted a redundant use of
cpumask_weight(). (When running on big systems, operations on CPU masks
aren't cheap enough to use them carelessly.)
Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Reviewed-by: George Dunlap <george.dunlap@eu.citrix.com>
Jan Beulich [Fri, 23 Aug 2013 13:01:53 +0000 (15:01 +0200)]
un-alias cpumask_any() from cpumask_first()
In order to achieve more symmetric distribution of certain things,
cpumask_any() shouldn't always pick the first CPU (which frequently
will end up being CPU0). To facilitate that, introduce a library-like
function to obtain random numbers.
The per-architecture function is supposed to return zero if no valid
random number can be obtained (implying that if occasionally zero got
produced as random number, it wouldn't be considered such).
As fallback this uses the trivial algorithm from the C standard,
extended to produce "unsigned int" results.
Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Reviewed-by: George Dunlap <george.dunlap@eu.citrix.com>
Jan Beulich [Fri, 23 Aug 2013 07:22:08 +0000 (09:22 +0200)]
PCI: break MSI-X data out of struct pci_dev_info
Considering that a significant share of PCI devices out there (not the
least the myriad of CPU-exposed ones) don't support MSI-X at all, and
that the amount of data is well beyond a handful of bytes, break this
out of the common structure, at once allowing the actual data to be
tracked to become architecture specific.
Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Fri, 23 Aug 2013 07:19:29 +0000 (09:19 +0200)]
x86: move struct bug_frame instances out of line
Just like Linux did many years ago, move them into a separate (data)
section, such that they no longer pollute instruction caches and TLBs.
Assertion frames, requiring two pointers to be stored, occupy two slots
in the array, with the second slot mimicking a frame the location
pointer of which doesn't match any address within .text or .init.text
(it effectively points back to the slot itself, which - being in a data
section - can't be reached by non-buggy execution).
Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
Ian Campbell [Fri, 19 Jul 2013 15:20:10 +0000 (16:20 +0100)]
xen: arm: retry trylock if strex fails on free lock.
This comes from the Linux patches 15e7e5c1ebf5 for arm32 and 4ecf7ccb1973 for
arm64 by Will Deacon and Catalin Marinas respectively. The Linux commit message
says:
An exclusive store instruction may fail for reasons other than lock
contention (e.g. a cache eviction during the critical section) so, in
line with other architectures using similar exclusive instructions
(alpha, mips, powerpc), retry the trylock operation if the lock appears
to be free but the strex reported failure.
I have observed this due to register_cpu_notifier containing:
if ( !spin_trylock(&cpu_add_remove_lock) )
BUG(); /* Should never fail as we are called only during boot. */
which was spuriously failing.
The ARMv8 variant is taken directly from the Linux patch. For v7 I had to
reimplement since we don't currently use ticket locks.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Fri, 19 Jul 2013 15:20:08 +0000 (16:20 +0100)]
xen/arm64: Assembly optimized bitops from Linux
This patch replaces the previous hashed lock implementaiton of bitops with
assembly optimized ones taken from Linux v3.10-rc4.
The Linux derived ASM only supports 8 byte aligned bitmaps (which under Linux
are unsigned long * rather than our void *). We do have actually uses of 4
byte alignment (i.e. the bitmaps in struct xmem_pool) which trigger alignment
faults.
Therefore adjust the assembly to work in 4 byte increments, which involved:
- bit offset now bits 4:0 => mask #31 not #63
- use wN register not xN for load/modify/store loop.
There is no need to adjust the shift used to calculate the word offset, the
difference is already acounted for in the #63->#31 change.
NB: Xen's build system cannot cope with the change from .c to .S file,
remove xen/arch/arm/arm64/lib/.bitops.o.d or clean your build tree.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Tim Deegan <tim@xen.org>
Chen Baozi [Tue, 13 Aug 2013 11:14:24 +0000 (19:14 +0800)]
xen/arm: Add the new OMAP UART driver.
TI OMAP UART introduces some features such as register access modes, which
makes its configuration and interrupt handling differs from 8250 compatible
UART. Thus, we seperate this driver from ns16550's implementation.
Signed-off-by: Chen Baozi <baozich@gmail.com> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Chen Baozi [Tue, 13 Aug 2013 11:14:21 +0000 (19:14 +0800)]
xen: rename ns16550-uart.h to 8250-uart.h and fix some typos
Since UARTs on OMAP5 & Allwinner's SoC are not ns16550 but only 8250
compatible, rename ns16550-uart.h to 8250-uart.h, which is a more pervasive
name. At the same time, fix some typos, which have redundance UART_
prefixes in some macros.
Andre Przywara [Thu, 22 Aug 2013 07:40:54 +0000 (09:40 +0200)]
ARM: fix const declaration of platform struct
As Julien pointed out the other day, the data type for the platform
DT name match struct is wrong.
To be really immutable, we have to use "const char * const".
Fix it on the three currently existing platforms.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Juergen Gross [Thu, 22 Aug 2013 09:24:00 +0000 (11:24 +0200)]
Correct X2-APIC HVM emulation
commit 6859874b61d5ddaf5289e72ed2b2157739b72ca5 ("x86/HVM: fix x2APIC
APIC_ID read emulation") introduced an error for the hvm emulation of
x2apic. Any try to write to APIC_ICR MSR will result in a GP fault.
Yang Zhang [Thu, 22 Aug 2013 08:59:01 +0000 (10:59 +0200)]
Nested VMX: Update APIC-v(RVI/SVI) when vmexit to L1
If enabling APIC-v, all interrupts to L1 are delivered through APIC-v.
But when L2 is running, external interrupt will casue L1 vmexit with
reason external interrupt. Then L1 will pick up the interrupt through
vmcs12. when L1 ack the interrupt, since the APIC-v is enabled when
L1 is running, so APIC-v hardware still will do vEOI updating. The problem
is that the interrupt is delivered not through APIC-v hardware, this means
SVI/RVI/vPPR are not setting, but hardware required them when doing vEOI
updating. The solution is that, when L1 tried to pick up the interrupt
from vmcs12, then hypervisor will help to update the SVI/RVI/vPPR to make
sure the following vEOI updating and vPPR updating corrently.
Also, since interrupt is delivered through vmcs12, so APIC-v hardware will
not cleare vIRR and hypervisor need to clear it before L1 running.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Acked-by: "Dong, Eddie" <eddie.dong@intel.com>
Yang Zhang [Thu, 22 Aug 2013 08:50:13 +0000 (10:50 +0200)]
Nested VMX: Force check ISR when L2 is running
External interrupt is allowed to notify CPU only when it has higher
priority than current in servicing interrupt. With APIC-v, the priority
comparing is done by hardware and hardware will inject the interrupt to
VCPU when it recognizes an interrupt. Currently, there is no virtual
APIC-v feature available for L1 to use, so when L2 is running, we still need
to compare interrupt priority with ISR in hypervisor instead via hardware.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com> Acked-by: "Dong, Eddie" <eddie.dong@intel.com>
Ian Campbell [Wed, 15 May 2013 13:47:32 +0000 (14:47 +0100)]
tools: allow user to specify a system qemu-xen binary
If this option is given don't bother building qemu-xen ourselves. Likely to be
handy for distros who have an existing qemu package which they want to reuse.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Tue, 6 Aug 2013 10:32:32 +0000 (11:32 +0100)]
tools: Make qemu-xen-traditional build optional.
Now that we have upstream qemu people may want to avoid building this extra
code.
There is a little bit of trickery in stubdom/configure.ac to ensure that the
ioemu stubdom is only built if qemu-traditional is enabled.
libxl will return an error if a caller tries to build a domain using
qemu-xen-traditional when this support was disabled at build time. Since
qemu-xen-traditional has been historically tightly bound to the Xen releases I
don't see any value in supporting "3rd party" provision of
qemu-xen-traditional.
We also do not want/need this on ARM therefore default is on for x86 and off
otherwise.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
[ ijc -- trivial conflicts in Tools.mk.in and tools/configure.ac.
Reran autogen.sh ]
Andre Przywara [Tue, 13 Aug 2013 15:12:35 +0000 (17:12 +0200)]
PL011: fix reverse logic for interrupt mask register
The PL011 IMSC register description is somehow fuzzy in the
documentation; by comparing it with the Linux implementation one can
see that the logic is actually reversed to Xen's implementation:
A "0" in field means interrupt disabled, a "1" enables it.
Therefore we enabled all interrupts instead of disabling them in the
beginning and later on masked the wrong interrupts.
Unclear how this worked on the Versatile Express, but this fix is
needed to get Calxeda Midway running (and works on VExpress, too).
Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Jan Beulich [Wed, 21 Aug 2013 06:38:40 +0000 (08:38 +0200)]
ACPI: fix acpi_os_map_memory()
It using map_domain_page() was entirely wrong. Use __acpi_map_table()
instead for the time being, with locking added as the mappings it
produces get replaced with subsequent invocations. Using locking in
this way is acceptable here since the only two runtime callers are
acpi_os_{read,write}_memory(), which don't leave mappings pending upon
returning to their callers.
Also fix __acpi_map_table()'s first parameter's type - while benign for
unstable, backports to pre-4.3 trees will need this.
Joby Poriyath [Tue, 20 Aug 2013 15:04:21 +0000 (17:04 +0200)]
interrupts: allow guest to set/clear MSI-X mask bit
Guest needs the ability to enable and disable MSI-X interrupts
by setting the MSI-X control bit, for a passed-through device.
Guest is allowed to write MSI-X mask bit only if Xen *thinks*
that mask is clear (interrupts enabled). If the mask is set by
Xen (interrupts disabled), writes to mask bit by the guest is
ignored.
Currently, a write to MSI-X mask bit by the guest is silently
ignored.
A likely scenario is where we have a 82599 SR-IOV nic passed
through to a guest. From the guest if you do
ifconfig <ETH_DEV> down
ifconfig <ETH_DEV> up
the interrupts remain masked. On VF reset, the mask bit is set
by the controller. At this point, Xen is not aware that mask is set.
However, interrupts are enabled by VF driver by clearing the mask
bit by writing directly to BAR3 region containing the MSI-X table.
From dom0, we can verify that
interrupts are being masked using 'xl debug-keys M'.
Ian Campbell [Thu, 8 Aug 2013 12:15:17 +0000 (13:15 +0100)]
xen: arm: Use a direct mapping of RAM on arm64
We have plenty of virtual address space so we can avoid needing to map and
unmap pages all the time.
A totally arbitrarily chosen 32GB frame table leads to support for 5TB of RAM.
I haven't tested with anything near that amount of RAM though. There is plenty
of room to expand further when that becomes necessary.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Thu, 8 Aug 2013 12:15:15 +0000 (13:15 +0100)]
xen: arm: allow virt_to_maddr to take either a pointer or an integer
This seems to be expected by common code which passes both pointers and
unsigned long as virtual addresses. The latter case in particular is in
init_node_heap() under a DIRECTMAP_VIRT_END #ifdef, which is why it hasn't
affected us yet (but will in a subsequent patch).
The new prototypes match the x86 versions apart from using vaddr_t instead of
unsigned long.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Tue, 23 Jul 2013 17:12:26 +0000 (18:12 +0100)]
xen: arm: reduce the size of the xen heap to max 1/8 RAM size
When building a 1GB dom0 on a system with 2GB RAM we are running out of domheap
pages, while there are still plenty of xenheap pages spare.
I would have sworn that when the domheap was exhausted we would fall back to
allocating xenheap pages but this doesn't appear to be the case. It's possible
that we have setup something incorrectly on ARM but alloc_domheap_pages pretty
clearly tries to allocate memory from MEMZONE_XEN+1..zone_hi.
Without the fallback from domheap to xenheap taking 1GB of any system with >1GB
of RAM for xenheap is excessive so instead set a limit of 1/8 of the total
amount of RAM. By way of comparison x86_32 used to have a static 12MB xenheap
(which also included .text etc) and in theory supported up to 16GB RAM, by that
measure 1/8 is plenty.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Fri, 19 Jul 2013 11:51:11 +0000 (12:51 +0100)]
xen: remove evtchn_upcall_mask from interface on ARM
On ARM event-channel upcalls are masked using the hardware's interrupt mask
bit and not by a software bit.
Leaving this field present in the interface has caused some confusion already
and is liable to mean it gets inadvertently used in the future. So arrange for
this field to be turned into a padding field on ARM by introducing a
XEN_HAVE_PV_UPCALL_MASK define.
This bit is also unused for x86 PV-on-HVM guests, but we can't realistically
distinguish those from x86 PV guests in the headers.
Add a per-arch vcpu_event_delivery_is_enabled function to replace an open
coded use of evtchn_upcall_mask in common code (in a debug keyhandler). The
existing local_event_delivery_is_enabled, which operates only on current, was
unimplemented on ARM and unused on x86, so remove it.
ifdef the use of evtchn_upcall_mask when setting up a new vcpu info page.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Fri, 19 Jul 2013 11:51:09 +0000 (12:51 +0100)]
xen: arm: include public/xen.h in foreign interface checking
mkheader.py doesn't cope with
struct foo { };
so add a newline.
Define unsigned long and long to a non-existent type on ARM so as to catch
their use.
Teach mkheader.py to cope with structs which are ifdef'd. This cannot cope
with #defines between the #ifdef and the struct definitions, so move
MAX_GUEST_CMDLINE to be next to its only usage.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Fri, 19 Jul 2013 11:51:08 +0000 (12:51 +0100)]
xen: only expose start_info on architectures which have a PV boot path
Most of this struct is PV MMU specific and it is not used on ARM at all.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Jan Beulich <JBeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Fri, 19 Jul 2013 11:51:07 +0000 (12:51 +0100)]
xen/compat: support XEN_HAVE_FOO ifdefs in public interface
This allows us expose or hide interface features on different architectures
without requiring nasty arch-specific ifdeffery.
Preserves any #ifdef with a XEN_HAVE_* symbol name, as well as any #else or
The ifdef symbol becomes COMPAT_HAVE in the compat versions so that
architectures can enable or disable interfaces for compat mode too. (This
actually just fell out of the way the existing stuff works and it didn't seem
worth jumping through hoops to make the name remain XEN_HAVE).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:57 +0000 (16:15 +0100)]
tools: drop 'sv'
I'm not even sure what this thing is. Looks like some sort of Twisted Python
based frontend to xend.
Whatever it is I am perfectly sure no one can be using it. Apart from drive by
build fixes caused by updates elsewhere it has seen no real development since
2005. I suspect it was never even finished/usable.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:56 +0000 (16:15 +0100)]
tools: disable blktap1 build by default
I don't think there are any dom0's around whose kernels support only blktap1
and not something newer like blktap2 or qdisk. Certainly not that you would
want to run Xen 4.4 on.
libxl will never use blktap1.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:54 +0000 (16:15 +0100)]
tools: remove lomount
Build was disabled by default in 2008 (9bb7f7e2aca49). As noted at the time
people should be using kpartx these days instead.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:53 +0000 (16:15 +0100)]
tools: remove miniterm
It has been disabled by default since 2008 (9bb7f7e2aca4). Back then Ian J
asserted it was useful to keep them in the tree in source form. I don't think
this is true anymore.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:52 +0000 (16:15 +0100)]
tools: delete xsview
This was apparently a Qt xenstore viewer. It hasn't been touched since it was
first committed in 2007 and I can't beleive anyone is actually using even if
it still happens to work.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:51 +0000 (16:15 +0100)]
tools: remove in tree libaio
We have defaulted to using the system libaio for a while now and I din't think
there are any relevant distros which don't have it that running Xen 4.4 would
be reasonable on.
Also it has caused confusion because it is not ever wanted on ARM, but the
build system doesn't express that (could be fixed, but deleting is the right
thing to do anyway).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:50 +0000 (16:15 +0100)]
tools: make building xend configurable.
xend has been deprecated for 2 releases now. Lets make it possible to not even
build it.
For now I'm leaving the default of on but I would like to change that before
the 4.4 release.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:49 +0000 (16:15 +0100)]
tools: move xm and xend under tools python
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Matt Wilson <msw@amazon.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Andre Przywara [Tue, 13 Aug 2013 15:13:07 +0000 (17:13 +0200)]
ARM: add Calxeda Midway platform
Calxeda Midway is an ARMv7 server platform with Cortex-A15 cores.
The peripheral side has many similarities with the machine known as
Highbank.
Add Calxeda Midway to the list of supported platforms to avoid a
warning on boot and provide the proper reset method.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Matthew Daley [Wed, 14 Aug 2013 22:20:54 +0000 (10:20 +1200)]
libxc: silence HVM domain creation messages
There's no need for xl to output these messages on HVM domain creation
to stderr by default.
Change their loglevels from XTL_INFO to XTL_DETAIL; then the messages
output by xl are the same as those for PV domain creation. These
now-silenced messages can still be seen using verbose (-v) mode.
Andre Przywara [Tue, 13 Aug 2013 15:12:52 +0000 (17:12 +0200)]
PL011: don't force baud rate of 38400 bps
The PL011 driver currently sets the baudrate to a hardcoded value of
38400 bits/second. This will break Calxeda Midway, which uses 115200
bps.
Instead don't tinker with the baud rate register at all and rely on
the firmware or bootloader setting the correct value in here.
This works fine on Versatile Express and Calxeda Midway.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Thu, 8 Aug 2013 12:56:51 +0000 (13:56 +0100)]
xen/arm: erratum 766422: decode thumb store during data abort
From the errata document:
When a non-secure non-hypervisor memory operation instruction generates a
stage2 page table translation fault, a trap to the hypervisor will be triggered.
For an architecturally defined subset of instructions, the Hypervisor Syndrome
Register (HSR) will have the Instruction Syndrome Valid (ISV) bit set to 1’b1,
and the Rt field should reflect the source register (for stores) or destination
register for loads.
On Cortex-A15, for Thumb and ThumbEE stores, the Rt value may be incorrect
and should not be used, even if the ISV bit is set. All loads, and all ARM
instruction set loads and stores, will have the correct Rt value if the ISV
bit is set.
To avoid this issue, Xen needs to decode thumb store instruction and update
the transfer register.
Signed-off-by: Julien Grall <julien.grall@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Tim Deegan [Thu, 15 Aug 2013 15:38:25 +0000 (16:38 +0100)]
xen/x86: hypervisor build fixes for FreeBSD.
These allow an x86_64 hypervisor to build on FreeBSD 9.1/amd64.
- like OpenBSD, needs a different arch passed to ld.
- like OpenBSD, stdarg.h and stdbool.h are in /usr/include.
Signed-off-by: Tim Deegan <tim@xen.org> Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Fri, 16 Aug 2013 09:46:25 +0000 (11:46 +0200)]
x86/boot: Remove stack segment parameter from smpboot
The stack segment is legacy remnant of a 32bit hypervisor, and not used in
64bit. Furthermore, the unsigned short in the structure actually aliases
whatever the linker decides to put next in the data section.
Drop the extern struct definition and change it to a simple void pointer,
which matches its definition in arch/x86/boot/x86_64.S
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Tim Deegan [Thu, 15 Aug 2013 12:00:18 +0000 (13:00 +0100)]
xen: Add stdbool.h workaround for BSD.
On *BSD, stdbool.h lives in /usr/include, but we don't want to have
that on the search path in case we pick up any headers from the build
host's C libraries.
Copy the equivalent hack already in place for stdarg.h: on all
supported compilers the contents of stdbool.h are trivial, so just
supply the things we need in a xen/stdbool.h header.
Signed-off-by: Tim Deegan <tim@xen.org> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Keir Fraser <keir@xen.org> Tested-by: Patrick Welche <prlw1@cam.ac.uk>
Jan Beulich [Wed, 14 Aug 2013 09:19:45 +0000 (11:19 +0200)]
x86: use "R" constraint for fxsaveq/fxrstorq enforcement
I became aware of this constraint's (referring to all legacy registers
in one go) existence by (accidentally) noticing Linux commit 82024135
("x86-64, fpu: Simplify constraints for fxsave/fxtstor").
Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Wed, 14 Aug 2013 09:18:24 +0000 (11:18 +0200)]
VT-d: protect against bogus information coming from BIOS
Add checks similar to those done by Linux: The DRHD address must not
be all zeros or all ones (Linux only checks for zero), and capabilities
as well as extended capabilities must not be all ones.
Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Ben Guthro <benjamin.guthro@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Tested-by: Ben Guthro <benjamin.guthro@citrix.com>
Acked by: Yang Zhang <yang.z.zhang@intel.com> Acked-by: Xiantao Zhang <xiantao.zhang@intel.com>
Andrew Cooper [Tue, 13 Aug 2013 12:31:01 +0000 (14:31 +0200)]
watchdog/crash: Always disable watchdog in console_force_unlock()
Depending on the state of the conring and serial_tx_buffer,
console_force_unlock() can be a long running operation, usually because of
serial_start_sync()
XenServer testing has found a reliable case where console_force_unlock() on
one PCPU takes long enough for another PCPU to timeout due to the watchdog
(such as waiting for a tlb flush callin).
The watchdog timeout causes the second PCPU to repeat the
console_force_unlock(), at which point the first PCPU typically fails an
assertion in spin_unlock_irqrestore(&port->tx_lock) (because the tx_lock has
been unlocked behind itself).
console_force_unlock() is only on emergency paths, so one way or another the
host is going down. Disable the watchdog before forcing the console lock to
help prevent having pcpus completing with each other to bring the host down.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 13 Aug 2013 12:29:00 +0000 (14:29 +0200)]
watchdog: Move watchdog from being x86 specific to common code
Augment watchdog_setup() to be able to possibly return an error, and introduce
watchdog_enabled() as a better alternative to knowing the architectures
internal details.
This patch does not change the x86 implementaion, beyond making it compile.
For header files, some includes of xen/nmi.h were only for the watchdog
functions, so are replaced rather than adding an extra include of
xen/watchdog.h
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
x86/AMD: Inject #GP instead of #UD when unable to map vmcb
According to AMD Programmer's Manual vol2, vmrun, vmsave and vmload
should inject #GP instead of #UD when unable to access memory
location for vmcb. Also, the code should make sure that L1 guest
EFER.SVME is not zero. Otherwise, #UD should be injected.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Reviewed-by: Tim Deegan <tim@xen.org>
x86/AMD: Fix nested svm crash due to assertion in __virt_to_maddr
Fix assertion in __virt_to_maddr when starting nested SVM guest
in debug mode. Investigation has shown that svm_vmsave/svm_vmload
make use of __pa() with invalid address.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Reviewed-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 22 Jul 2013 18:17:20 +0000 (19:17 +0100)]
xen: arm: document which hypercalls (and subops) are supported on ARM
There are many hypercalls which make no sense or which are not supported on ARM
systems but it's not all that obvious which ones we do support. So lets try and
document the hypercalls which are useful on ARM.
I'm not sure this is the best way to go about this, I'm open to other ideas.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Tim Deegan <tim@xen.org>?
Andrew Cooper [Thu, 8 Aug 2013 13:20:36 +0000 (15:20 +0200)]
cleanup unused request{_dt,}_irq() parameter
The irqflags parameter appears to be an unused vestigial parameter right from
the integration of the IOMMU code in 2007. The parameter is 0 at all
callsites and never used.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Ian Campbell <Ian.Campbell@citrix.com>
Julien Grall [Thu, 1 Aug 2013 16:09:29 +0000 (17:09 +0100)]
xen/arm: Implement a virtual UART
This code is based on the previous vuart0 implementation. Unlike the latter,
it's intend to replace UART stolen by XEN to DOM0 via dtuart=... on its
command line.
It's useful when the kernel is compiled with early printk enabled or for a
single platform. Most of the time, the hardcoded code to handle the UART
will need 2 registers: status and data, the others registers can be
implemented as RAZ/WI.
This commit will also drop support of early printk (based on vexpress pl011)
in the guest.
Signed-off-by: Julien Grall <julien.grall@linaro.org> Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:28 +0000 (17:09 +0100)]
xen/arm: New callback in uart_driver to retrieve serial information
There is no way to retrieve basic informations (base address, size, ....) for
an UART. This callback will be used later to partially emulate the real UART
for DOM0 on ARM.
Patrick Welche [Thu, 8 Aug 2013 10:43:29 +0000 (11:43 +0100)]
libelf: Fix typo in header guard macro
s/__LIBELF_PRIVATE_H_/__LIBELF_PRIVATE_H__/
Signed-off-by: Patrick Welche <prlw1@cam.ac.uk> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Ian Campbell <ian.campbell@citrix.com>
Ian Campbell [Mon, 22 Jul 2013 18:16:13 +0000 (19:16 +0100)]
docs: Build docs for ARM as well as x86_64
Also do x86_32 (which is still relevant since it is "compat mode").
Install as hypercall-$ARCH but keep the hypercall path around as a symlink to
the x86_64 version so links (e.g. to http://xenbits.xen.org/docs/ keep working.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Nai Xia [Tue, 6 Aug 2013 16:25:48 +0000 (00:25 +0800)]
mem_sharing_nominate_page: p2mt should never change before p2m_change_type()
The p2mt change check for p2m_change_type() was first introduced when
this code path was not protected by p2m_lock(). Now this code path is
protected by p2m_lock. So p2mt should never change before
p2m_change_type().
Signed-off-by: Nai Xia <nai.xia@gmail.com> Acked-by: Andres Lagar-Cavilla <andres@lagarcavilla.org> Acked-by: Tim Deegan <tim@xen.org>
Jan Beulich [Thu, 8 Aug 2013 09:13:54 +0000 (11:13 +0200)]
pciif: add multi-vector-MSI command
The requested vector count is to be passed in struct xen_pci_op's info
field. Upon failure, if a smaller vector count might work, the backend
will pass that smaller count in the value field (which so far is always
being set to zero in the error path).
Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Thu, 8 Aug 2013 09:12:14 +0000 (11:12 +0200)]
x86: enable multi-vector MSI
This implies
- extending the public interface to have a way to request a block of
MSIs
- allocating a block of contiguous pIRQ-s for the target domain (but
note that the Xen IRQs allocated have no need of being contiguous)
- repeating certain operations for all involved IRQs
- fixing multi_msi_enable()
- adjusting the mask bit accesses for maskable MSIs
Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Keir Fraser <keir@xen.org>
projects / xen.git / log