Drop el3_no_el2_cp_reginfo, el3_no_el2_v8_cp_reginfo, and the local
vpidr_regs definition, and rely on the squashing to ARM_CP_CONST
while registering for v8.
This is a behavior change for v7 cpus with Security Extensions and
without Virtualization Extensions, in that the virtualization cpregs
are now correctly not present. This would be a migration compatibility
break, except that we have an existing bug in which migration of 32-bit
cpus with Security Extensions enabled does not work.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm: Handle cpreg registration for missing EL
More gracefully handle cpregs when EL2 and/or EL3 are missing.
If the reg is entirely inaccessible, do not register it at all.
If the reg is for EL2, and EL3 is present but EL2 is not,
either discard, squash to res0, const, or keep unchanged.
Per rule RJFFP, mark the 4 aarch32 hypervisor access registers
with ARM_CP_EL3_NO_EL2_KEEP, and mark all of the EL2 address
translation and tlb invalidation "regs" ARM_CP_EL3_NO_EL2_UNDEF.
Mark the 2 virtualization processor id regs ARM_CP_EL3_NO_EL2_C_NZ.
This will simplify cpreg registration for conditional arm features.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Leif Lindholm [Thu, 5 May 2022 11:37:40 +0000 (12:37 +0100)]
MAINTAINERS/.mailmap: update email for Leif Lindholm
NUVIA was acquired by Qualcomm in March 2021, but kept functioning on
separate infrastructure for a transitional period. We've now switched
over to contributing as Qualcomm Innovation Center (quicinc), so update
my email address to reflect this.
Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com>
Message-id: 20220505113740.75565-1-quic_llindhol@quicinc.com Cc: Leif Lindholm <leif@nuviainc.com> Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[Fixed commit message typo] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Merge tag 'qemu-sparc-20220508' of https://github.com/mcayland/qemu into staging
qemu-sparc queue
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# gpg: Signature made Sun 08 May 2022 12:53:43 PM CDT
# gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* tag 'qemu-sparc-20220508' of https://github.com/mcayland/qemu: (53 commits)
artist: only render dirty scanlines on the display surface
artist: remove unused ROP8OFF() macro
artist: checkpatch and newline style fixes
hppa: simplify machine function names in machine.c
hppa: fold machine_hppa_machine_init() into machine_hppa_machine_init_class_init()
hppa: use MACHINE QOM macros for defining the hppa machine
hppa: remove the empty hppa_sys.h file
hppa: move enable_lan() define from hppa_sys.h to machine.c
hppa: remove unused trace-events from from hw/hppa
hppa: remove hw/hppa/pci.c
hppa: move hppa_pci_ignore_ops from pci.c to machine.c
lasi: move from hw/hppa to hw/misc
hppa: move device headers from hppa_sys.h into individual .c files
lasi: use numerical constant for iar reset value
lasi: use constants for device register offsets
lasi: move lasi_initfn() to machine.c
lasi: remove address space parameter from lasi_initfn()
lasi: move PS2 initialisation to machine.c
lasi: move second serial port initialisation to machine.c
lasi: move parallel port initialisation to machine.c
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
artist: only render dirty scanlines on the display surface
The framebuffer_update_display() function returns the dirty scanlines that were
touched since the last display update, however artist_update_display() always calls
dpy_gfx_update() with start and end scanlines of 0 and s->height causing the
entire display surface to be rendered on every update.
Update artist_update_display() so that dpy_gfx_update() only renders the dirty
scanlines on the display surface, bypassing the display surface rendering
completely if framebuffer_update_display() indicates no changes occurred.
This noticeably improves boot performance when the framebuffer is enabled on my
rather modest laptop here, including making the GTK UI usable.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220504153708.10352-4-mark.cave-ayland@ilande.co.uk> Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This file is now just a simple wrapper that includes hppa_hardware.h so remove
the file completely, and update its single user in machine.c to include
hppa_hardware.h directly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-48-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This is to allow us to decouple the LASI device from the board logic. If it is
decided later that this value needs to be configurable then it can easily be
converted to a qdev property.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-41-mark.cave-ayland@ilande.co.uk> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Instead of generating the offset based upon the physical address of the
register, add constants for each of the device registers to lasi.h and
update lasi.c to use them.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-40-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
The existing code checks for serial_hd(1) but sets the LASI serial port chardev
to serial_hd(0). Use serial_hd(1) for the LASI serial port and also set the
serial port endian to DEVICE_BIG_ENDIAN (which also matches the endian of the
existing serial port).
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-32-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
lasi: move memory region initialisation to new lasi_init() function
Create a new lasi_init() instance initialisation function and move the LASI
memory region initialisation into it. Rename the existing lasi_init() function
to lasi_initfn() for now.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-25-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
dino: use numerical constant for iar0 and iar1 reset values
This is to allow us to decouple the DINO device from the board logic. The choice
of using a hard-coded constant (along with a comment) is to match how this is
already done for toc_addr. If it is decided later that these values need to be
configurable then they can easily be converted to qdev properties.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-21-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
According to the comments in dino.c the timer IRQ is unused, so remove the empty
dino_set_timer_irq() handler function and simply pass NULL to mc146818_rtc_init()
in machine.c instead.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-19-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
hppa: use new CONFIG_HPPA_B160L option instead of CONFIG_DINO to build hppa machine
DINO refers to the GSC-PCI bridge device which will soon be handled separately,
however the QEMU HPPA machine is actually based upon the HPPA B160L as indicated
by the Linux kernel dmesg output when booted in qemu-system-hppa and the QEMU
MAINTAINERS file.
Update the machine configuration to use CONFIG_HPPA_B160L instead of CONFIG_DINO
and also update the machine description accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-13-mark.cave-ayland@ilande.co.uk> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This is to allow access to DinoState from outside dino.c. With the changes to
the headers it is now possible to remove the duplicate definition for
TYPE_DINO_PCI_HOST_BRIDGE from hppa_sys.h.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20220504092600.10048-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Paolo Bonzini [Wed, 27 Apr 2022 10:01:48 +0000 (12:01 +0200)]
pc: remove -soundhw pcspk
The pcspk device is the only user of the init_isa function, and the only
-soundhw option which does not create a new device (it hacks into the
PCSpkState by hand). Remove it, since it was deprecated.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:34:05 +0000 (17:34 +0200)]
meson: create have_vhost_* variables
When using Meson options rather than config-host.h, the "when" clauses
have to be changed to if statements (which is not necessarily great,
though at least it highlights which parts of the build are per-target
and which are not).
Do that before moving vhost logic to meson.build, though for now
the variables are just based on config-host.mak data.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:34:04 +0000 (17:34 +0200)]
build: move vhost-user-fs configuration to Kconfig
vhost-user-fs is a device and it should be possible to enable/disable
it with --without-default-devices, not --without-default-features.
Compute its default value in Kconfig to obtain the more intuitive
behavior.
In this case the configure options were undocumented, too.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:34:03 +0000 (17:34 +0200)]
build: move vhost-scsi configuration to Kconfig
vhost-scsi and vhost-user-scsi are two devices of their own; it should
be possible to enable/disable them with --without-default-devices, not
--without-default-features. Compute their default value in Kconfig to
obtain the more intuitive behavior.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:34:02 +0000 (17:34 +0200)]
build: move vhost-vsock configuration to Kconfig
vhost-vsock and vhost-user-vsock are two devices of their own; it should
be possible to enable/disable them with --without-default-devices, not
--without-default-features. Compute their default value in Kconfig to
obtain the more intuitive behavior.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Cleanup to ease review of the conversion to meson. vhost_net_user and
vhost_net_vdpa are never assigned anything in the command line parsing
loop, so they are always equal to $vhost_user and $vhost_vdpa.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:33:58 +0000 (17:33 +0200)]
meson: pass more options directly as -D
If an option is not used anywhere by the configure script, it can be just
added to $meson_options even if it is not parsed by the automatically
generated bits in scripts/meson-buildoptions.sh.
The only slightly tricky case is $debug, where the
if test "$fortify_source" = "yes" ; then
QEMU_CFLAGS="-U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 $QEMU_CFLAGS"
debug=no
fi
assignment is dead; configure sets fortify_source=no whenever debug=yes.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:33:57 +0000 (17:33 +0200)]
configure: switch directory options to automatic parsing
While prefix, bindir and qemu_suffix needs special treatment due to
differences between Windows and POSIX systems, everything else
needs no extra code in configure.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:33:56 +0000 (17:33 +0200)]
meson: always combine directories with prefix
Meson allows directories such as "bindir" to be relative to the prefix. Right
now configure is forcing an absolute path, but that is not really necessary:
just make sure all uses of the directory variables are prefixed appropriately.
Do the same also for the options that are custom for QEMU, i.e. docdir and
qemu_firmwarepath.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:33:47 +0000 (17:33 +0200)]
meson, configure: move Xen detection to meson
This is quite a complicated check. I moved all the test programs to
a single file in scripts/, picking the right program with #if and a -D
flag in meson.build's cc.links() invocation.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 20 Apr 2022 15:33:48 +0000 (17:33 +0200)]
meson-buildoptions: add support for string options
Allow using the buildoptions.json file for more options, namely anything
that is not a boolean or multiple-choice.
The mapping between configure and meson is messy for string options,
so allow configure to use to something other than the name in
meson_options.txt. This will come in handy anyway for builtin
Meson options such as b_lto or b_coverage.
Tested-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Support for xcr0 to be able to enable xsave/xrstor. This by itself
is not sufficient to enable xsave/xrstor. WHPX XSAVE API's also
needs to be hooked up.
Signed-off-by: Sunil Muthuswamy <sunilmut@microsoft.com>
Message-Id: <MW2PR2101MB1116F07C07A26FD7A7ED8DCFC0780@MW2PR2101MB1116.namprd21.prod.outlook.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Merge tag '20220506-xtensa-1' of https://github.com/OSLL/qemu-xtensa into staging
target/xtensa updates for v7.1:
- expand test coverage to MMUv3, cores without windowed registers or
loop option;
- import lx106 core (used in the esp8266 IoT chips);
- use tcg_constant_* in the front end;
- add clock input to the xtensa CPU;
- fix reset state of the xtensa MX PIC;
- implement cache testing opcodes.
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# gpg: Signature made Fri 06 May 2022 05:40:26 PM CDT
# gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg: issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [undefined]
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044
* tag '20220506-xtensa-1' of https://github.com/OSLL/qemu-xtensa:
target/xtensa: implement cache test option opcodes
tests/tcg/xtensa: fix vectors and checks in timer test
tests/tcg/xtensa: enable mmu tests for MMUv3
tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
tests/tcg/xtensa: remove dependency on the loop option
tests/tcg/xtensa: fix watchpoint test
tests/tcg/xtensa: restore vecbase SR after test
tests/tcg/xtensa: fix build for cores without windowed registers
hw/xtensa: fix reset value of MIROUT register of MX PIC
target/xtensa: add clock input to xtensa CPU
target/xtensa: import core lx106
target/xtensa: use tcg_constant_* for remaining opcodes
target/xtensa: use tcg_constant_* for FPU conversion opcodes
target/xtensa: use tcg_constant_* for numbered special registers
target/xtensa: use tcg_constant_* for TLB opcodes
target/xtensa: use tcg_constant_* for exceptions
target/xtensa: use tcg_contatnt_* for numeric literals
target/xtensa: fix missing tcg_temp_free in gen_window_check
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Max Filippov [Wed, 27 Apr 2022 17:06:00 +0000 (10:06 -0700)]
tests/tcg/xtensa: fix vectors and checks in timer test
Timer test assumes that timer 0 IRQ has level 1 and other timers have
higher level IRQs. This assumption is not correct and the levels may be
arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and
using it for vector selection and by making the check for the timer
exception cause conditional.
Max Filippov [Tue, 26 Apr 2022 03:05:18 +0000 (20:05 -0700)]
tests/tcg/xtensa: enable mmu tests for MMUv3
MMU test suite is disabled for cores that have spanning TLB way, i.e.
for all MMUv3 cores. Instead of disabling it make testing region virtual
addresses explicit and invalidate TLB mappings for entries that conflict
with the test.
Max Filippov [Tue, 26 Apr 2022 03:05:18 +0000 (20:05 -0700)]
tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
Autorefill tests in the phys_mem test suite are disabled for cores that
have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it
invalidate TLB mappings for entries that conflict with the test.
Max Filippov [Tue, 26 Apr 2022 00:16:01 +0000 (17:16 -0700)]
tests/tcg/xtensa: fix watchpoint test
xtensa core may have only one set of DBREAKA/DBREAKC registers. Don't
hardcode register numbers in the test as 0 and 1, use macros that only
index valid DBREAK* registers.
Max Filippov [Sun, 24 Apr 2022 15:33:16 +0000 (08:33 -0700)]
tests/tcg/xtensa: restore vecbase SR after test
Writing garbage into the vecbase SR results in hang in the subsequent
tests that expect to raise an exception. Restore vecbase SR to its
reset value after the test.
Max Filippov [Tue, 26 Apr 2022 16:24:01 +0000 (09:24 -0700)]
hw/xtensa: fix reset value of MIROUT register of MX PIC
MX PIC comes out of reset with IRQ routing registers set to 0, thus
not delivering any external IRQ to any connected CPU by default.
Fix the model to match the hardware.
Simon Safar [Sat, 23 Apr 2022 04:08:36 +0000 (21:08 -0700)]
target/xtensa: import core lx106
This is the core used in e.g. ESP8266 chips. Importing them
using import_core.sh, with the required files sourced from
https://github.com/espressif/xtensa-overlays
core-lx106.c was generated by the script; the only change is removing
the reference to core-matmap.h which doesn't seem to be available.
Signed-off-by: Simon Safar <simon@simonsafar.com> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20220423040835.29254-1-simon@simonsafar.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Max Filippov [Thu, 21 Apr 2022 20:46:20 +0000 (13:46 -0700)]
target/xtensa: use tcg_constant_* for remaining opcodes
- gen_jumpi passes target PC to the helper;
- gen_callw_slot uses callinc (1..3);
- gen_brcondi passes immediate field (less than 32 different possible
values) to the helper;
- disas_xtensa_insn passes PC to the helpers;
- translate_entry passes PC, stack register number (0..15) and stack
frame size to the helper;
- gen_check_exclusive passes PC and boolean flag to the helper;
- test_exceptions_retw passes PC to the helper;
- gen_check_atomctl passes PC to the helper;
- translate_ssai passes immediate shift amount (0..31) to the helper;
- gen_waiti passes next PC and an immediate (0..15) to the helper;
use tcg_constant_* for the constants listed above. Fold gen_waiti body
into the translate_waiti as it's the only user.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
projects / qemu-xen.git / log