Kevin O'Connor [Sat, 9 Mar 2013 18:04:47 +0000 (13:04 -0500)]
vgabios: Fix cirrus memory clear on mode switch.
The cirrus_clear_vram() code wasn't actually doing anything because of
a u8 overflow. Fix that.
Fill with 0xff when performing a legacy cirrus mode switch (WinXP has
been observed to incorrectly render dialog boxes if the memory is
filled to 0). This was the behavior of the original LGPL vgabios
code. To support this, add mechanism (MF_LEGACY) to allow vga drivers
to detect if the mode switch is from vesa or int10.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:39:49 +0000 (19:39 -0500)]
Use VARVERIFY32INIT on global variables that point to "tmp" memory.
Enable the recently added build check on global variables that are (or
contain) pointers to memory allocated by malloc_tmp(). This helps
detect cases where temporary memory is accessed after POST.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:36:28 +0000 (19:36 -0500)]
Add VARVERIFY32INIT attribute for variables only available during "init".
Add a build check to verify certain variables are only reachable via
the 32bit "init" code. This can be used as a mechanism to enforce
certain data (and code that accesses that data) as only available
during POST.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:33:39 +0000 (19:33 -0500)]
smm: Don't use PCIDevices list in smm_setup().
The smm_setup() call is invoked from resume. The PCIDevices list is
only valid during POST. Cache the necessary PCI BDF ids so that
PCIDevices isn't needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Mar 2013 00:31:14 +0000 (19:31 -0500)]
shadow: Don't use PCIDevices list in make_bios_readonly().
The make_bios_readonly() call is invoked from resume. The PCIDevices
list is only valid during POST. Cache the necessary PCI BDF ids so
that PCIDevices isn't needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 5 Mar 2013 09:52:21 +0000 (17:52 +0800)]
Cache boot-fail-wait to avoid romfile access after POST.
Memory allocated with malloc_tmp() can't be used after the POST phase.
So, access boot-fail-wait in post phase and store it for the boot
phase to use. This fixes the regression introduced by commit 59d6ca52.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Signed-off-by: Amos Kong <akong@redhat.com>
Kevin O'Connor [Sun, 3 Mar 2013 02:26:54 +0000 (21:26 -0500)]
floppy: Clean up Check Interrupt Status code.
Don't run the Check Interrupt Status command from the floppy hardware
interrupt handler. Instead, run it where it is needed - after
controller startup and after a recalibration command. Also, use
floppy_pio() to issue the command instead of open coding it.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 2 Mar 2013 23:14:35 +0000 (18:14 -0500)]
Support using the "extra stack" for all 16bit irq entry points.
Using the internal stack reduces the amount of space that SeaBIOS uses
on the caller's stack. This is known to help some very old operating
systems (like DOS 1.0). However, there is a possibility that this
will break any operating systems that calls a legacy 16bit irq in
16bit protected mode (no OSes have yet to be identified as doing
this), so make the ability config dependent.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 23 Feb 2013 15:37:58 +0000 (10:37 -0500)]
Try to detect an unsuccessful hard-reboot to prevent soft-reboot loops.
There have been various kvm bugs that prevent reboots from working
properly. Generalize the existing test for a failed reboot to better
catch these cases.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Alex Williamson [Thu, 21 Feb 2013 16:12:23 +0000 (09:12 -0700)]
seabios: Add a dummy PCI slot to irq mapping function
This should never get called, but if we somehow get a new chipset
that fails to implement their own pci_slot_get_irq function, fail
gracefully and add a debug log message.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Alex Williamson [Fri, 15 Feb 2013 21:11:41 +0000 (14:11 -0700)]
seabios q35: Add new PCI slot to irq routing function
q35/ich9 doesn't use the same interrupt mapping function as
i440fx/piix. PIRQA:D and PIRQE:H are programmed identically, but we
start at index 0, not index -1. Slots 25 through 31 are also
programmed independently.
When running qemu w/o this patch, a device at address 0:6.0 will have
its PCI interrupt line register programmed with irq 10 (as seen by
info pci), but it actually uses irq 11 (as reported the guest). Half
of the interrupt lines are misprogrammedi like this. Functionally, a
fully emulated qemu guest doesn't care much, but when we try to use
device assignment, we really need to know the correct irqs.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Kevin O'Connor [Wed, 20 Feb 2013 02:35:20 +0000 (21:35 -0500)]
Eliminate separate BiosTableSpace[] space for f-segment allocations.
The BiosTableSpace variable was used to ensure there was sufficient
space in the f-segment for malloc_fseg() calls. However, it added 2K
to the final image size to reserve that space.
Update the build to determine where to put the f-segment allocations.
In most cases (when code relocation is enabled) allocations can be
done in the space free'd from the "init" sections and no additional
space needs to be reserved in the final image. This also has the
benefit of not fragmenting the f-segment allocation space.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 06:33:45 +0000 (01:33 -0500)]
Calculate "RamSize" needed by 16bit interface dynamically.
Calculate a LegacyRamSize directly from the e820 map for use by
handle_1588() and handle_15e801() (the only two external interfaces
that require "RamSize"). All other users of the existing RamSize (and
RamSizeOver4G) variables are specific to QEMU, so move the
declarations to paravirt.c.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 06:02:50 +0000 (01:02 -0500)]
Don't relocate "varlow" variable references at runtime.
Since the final location of the "varlow" variables are known at build
time, link the final locations into the binary during the build. The
16bit code was already done at link time - update the build so the
32bit code is also done at link time.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 19 Feb 2013 04:36:03 +0000 (23:36 -0500)]
Convert VAR16VISIBLE, VAR16EXPORT, and VAR32VISIBLE to VARFSEG.
Convert all users of the alternative variable exports to VARFSEG.
There isn't a significant distinction between the existing types of
exports, so it's simpler to just use one type going forward.
The new VARFSEG declaration is only emitting when in 32bit mode, so
update and move some variables as needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Alex Williamson [Fri, 15 Feb 2013 21:11:35 +0000 (14:11 -0700)]
seabios q35: Enable all PIRQn IRQs at startup
We seem to use the IRQEN bit of the PIRQn registers interchangeably
to select APIC mode or to disable an IRQ. I can't decide if we're
intending to disable the IRQ or select APIC mode here, but in either
case it prevents PIC mode assigned devices from working. When seabios
writes IRQEN to these registers, qemu interprets that as APIC mode,
so while the boot ROM driver is waiting for an interrupt on ISA
compatible IRQ 10 or 11, KVM is injecting interrupts to APIC pins
16 - 23. Devices on the root bus use PIRQE:H while the root ports
use PIRQA:D. Enable them all so we don't limit where we support boot
ROMs. The guest will later disable unused IRQs with the ACPI _DIS
method.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Kevin O'Connor [Mon, 18 Feb 2013 15:28:55 +0000 (10:28 -0500)]
Verify CC is valid during build tests.
Update test-build.sh to report if it can't run the c compiler at all.
Without this test, a totally non-working build environment will yield
an "invalid LD" message which can be confusing.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sun, 17 Feb 2013 18:58:28 +0000 (13:58 -0500)]
Clarify build generated "zone low" values.
Rename datalow_base (and similar) to zonelow_base, and datalow_start
(and similar) to varlow_start. This helps distinguish between the
bounds for the runtime dynamic memory pool and the compile time global
variables.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Laszlo Ersek [Thu, 14 Feb 2013 04:43:32 +0000 (05:43 +0100)]
Enable VGA output when setting Cirrus-specific mode
This patch does the same for Cirrus as David's following patch for bochs,
originally posted under
<http://www.seabios.org/pipermail/seabios/2013-February/005434.html>:
Enable VGA output when settings bochs-specific mode
When used from OVMF+CSM, we got no video output. It appears that we were
never enabling the display output except when configuring a text mode.
Which never happens, in the OVMF+CSM case.
In my testing on RHEL-6.3 with OVMF -D CSM_ENABLE / CONFIG_CSM bios.bin /
CONFIG_QEMU vgabios.bin, using Cirrus, VESA mode 0x115 is selected (Direct
Color, 800x600x24).
According to <http://www.osdever.net/FreeVGA/vga/attrreg.htm>,
cirrus_switch_mode()
stdvga_attr_mask()
currently keeps/sets the "Attribute Controller Graphics Enable" bit set in
the "Attribute Mode Control Register". When invoked from OVMF+CSM, that is
not enough however, so let's do the same as for Bochs:
stdvga_attrindex_write(0x20);
which corresponds to setting the "Palette Address Source" bit in the
"Attribute Address Register":
"This bit is set to 0 to load color values to the registers in the
internal palette. It is set to 1 for normal operation of the attribute
controller. [...]"
clext_set_mode()
stdvga_set_mode() -- for regular modes
stdvga_attrindex_write() -- existing call
cirrus_switch_mode() -- for Cirrus modes
stdvga_attrindex_write() -- call added by this patch
Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Fri, 8 Feb 2013 15:50:54 +0000 (15:50 +0000)]
Enable VGA output when settings bochs-specific mode
When used from OVMF+CSM, we got no video output. It appears that we were
never enabling the display output except when configuring a text mode.
Which never happens, in the OVMF+CSM case.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Thu, 14 Feb 2013 08:56:20 +0000 (08:56 +0000)]
Make CONFIG_OPTIONROMS_DEPLOYED depend on CONFIG_QEMU
Potentially we could even kill it off completely, since it only works
with old versions of Qemu. But it can stay for now as long as it doesn't
offend me in the CSM build...
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
David Woodhouse [Sun, 10 Feb 2013 00:51:56 +0000 (00:51 +0000)]
Unify return path for CSM to go via csm_return()
This allows us to keep the entry_csm code simple, and ensures that we
consistently do things like saving the PIC mask (and later setting
UmbStart) on the way back to UEFI.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Kevin O'Connor [Sun, 10 Feb 2013 04:58:55 +0000 (23:58 -0500)]
Only perform SMP setup on QEMU.
The SMP setup initializes MTRRs on extra CPUs and populates the
CountCPUs variable. On coreboot the CPUs should already be
initialized and the CountCPUs variable isn't used anywhere.
There have also been reports of the SIPI does not work on some real
machines. So, it's best not to invoke one if it isn't needed.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Fri, 8 Feb 2013 04:32:48 +0000 (23:32 -0500)]
Consistently use CONFIG_COREBOOT, CONFIG_QEMU, and runningOnXen().
CONFIG_QEMU means compile to start from QEMU (and possibly
Xen/KVM/Bochs) and definitely running under QEMU (or Xen/KVM/Bochs).
CONFIG_COREBOOT means compile for coreboot and definitely running
under coreboot. Places that used CONFIG_COREBOOT to mean "running on
real hardware" have been changed to use !CONFIG_QEMU.
CONFIG_QEMU_HARDWARE enables support for some virtual hardware devices
even if QEMU didn't start SeaBIOS.
usingXen() is replaced by runningOnXen().
runningOnQEMU() is added to hardware devices that are only safe to
access when we are sure we are running under QEMU (or Xen/KVM/Bochs).
Neither the coreboot nor the csm code currently enable runningOnQEMU,
but future patches may.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
David Woodhouse [Sun, 3 Feb 2013 22:41:41 +0000 (23:41 +0100)]
Add find_pmtimer() function
With CSM (and maybe coreboot) we'll want to find the pmtimer from the ACPI
tables, instead of knowing where it is and *putting* it into the ACPI
tables.
Extract the first part of the existing find_resume_vector() function into
a find_fadt() function, and use it from both find_resume_vector() and our
new find_pmtimer().
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Kevin O'Connor [Mon, 21 Jan 2013 17:14:29 +0000 (12:14 -0500)]
POST: Move cpu caching and dma setup to platform_hardware_setup().
The CPU cache is enabled and DMA is disabled on all real-world POST
entry situations, so no need to do this in the low-level "pre-init"
phase. Instead, move it to the platform hardware setup stage.
Also, move the setting of the reboot flags (which control reset-vector
entry point handling) to ivt_init().
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Mon, 21 Jan 2013 16:38:49 +0000 (11:38 -0500)]
POST: Reorganize post entry and "preinit" functions.
Unlocking ram in handle_post() is tricky and only needed under qemu.
Separate out that logic from the coreboot/xen paths by invoking
handle_elf_post separately. This simplifies both the qemu and
non-qemu code paths.
Also, organize all the "pre-init" functions into one section of the
file.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Wed, 6 Feb 2013 03:36:13 +0000 (22:36 -0500)]
Ensure exported symbols are visible in the final link
I'm about to introduce some post-processing in checkrom.py which will want
access to public symbols. So let's make sure they're defined in the final
link even if they're *not* cross-referenced from a different code section.
build: Define 16bit exported symbols in final rom.o object.
Based on patch by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
David Woodhouse [Thu, 17 Jan 2013 21:23:46 +0000 (21:23 +0000)]
Complete and checksum EFI_COMPATIBILITY16_TABLE at build time
GCC, for reasons unknown, will refuse to compile code such as
extern int bar;
uint16_t foo = &bar;
The assembler would happily emit a R_386_16 relocation for this if asked
nicely, and all would be well. But instead, GCC complains about the
initialiser not being constant.
So we tend to fill in 16-bit offsets at run-time, which is only
moderately inefficient. But for the CSM table used by EFI, it doesn't
work. We need the offset to be present in the *image*, before a line of
our own code has been run. Likewise the checksum.
This special-cases the table and entry point in checkrom.py rather than
attempting to do something generic. I did have a functional generic
implementation which could be invoked from csm.c along the lines of
CHECKSUM(csm_compat_table, TableChecksum)
... and which would emit the required offsetof(typeof(\1), \2) into
a special data section which was elided from the final build but parsed
by 'objdump -s' and the location of the table to be checksummed was
inferred from the name of the *variable* that got put into that special
section... seriously, it's better just to special-case it.
It was baroque enough just for the checksums, and filling in the entry
point which required access to *two* symbols was probably going to involve
emitting a *string* into that special build-data section. It had to die.
So yes, we have hard-coded symbol names, and even magic numbers in the
python script for table offsets etc., but that's because this is an ABI.
It doesn't change, and neither do any of the other tables that we might
now consider filling at build time just to avoid having to spend time
on doing so at runtime.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
projects / seabios.git / log