Modify ACPI to only supply _EJ0 methods for PCI slots that support hotplug.
This is done by runtime patching:
- Instrument SSDT ASL code with ACPI_EXTRACT directives
tagging _EJ0 and _ADR fields.
- At compile time, tools/acpi_extract.py looks for these methods
in ASL source finds the matching AML, and stores the offsets
of these methods in tables named aml_ej0_name and aml_adr_dword.
- At run time, go over aml_ej0_name, use aml_adr_dword
to get slot information and check which slots support hotplug.
If hotplug is disabled, we patch the _EJ0 NameString in ACPI table,
replacing _EJ0 with EJ0_.
Note that this has the same checksum, but is ignored by OSPM.
Note: the method used is robust in that we don't need
to change any offsets manually in case of ASL code changes.
As all parsing is done at compile time, any unexpected input causes
build failure, not a runtime failure.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
The point of this split is to make runtime patching easier.
DSDT is required to supply: PCI0 - PCI root device object;
PCEJ - Method object to eject a PCI slot.
Additionally, SSDT is required to supply PCNT - Method object to notify
OSPM of a PCI slot event.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Paolo Bonzini [Fri, 18 Nov 2011 14:59:24 +0000 (15:59 +0100)]
usb: fix boot paths
The fw paths for USB devices that SeaBIOS computes are off-by-one,
because QEMU builds those paths with a numbering that starts from one
(see usb_fill_port and usb_hub_initfn in QEMU). Fix that so that
the numbering agrees.
Kevin O'Connor [Sat, 19 Nov 2011 19:21:51 +0000 (14:21 -0500)]
usb-ehci: Fix races with controller on updates to QH.
The EHCI controller writes to the TD after writing to the QH, so the
driver must wait for all the TDs to be complete before considering the
transfer completed. (The previous implementation was particularly bad
as it only checked that the last TD was in progress before considering
the transfer complete.)
Also, avoid writing to the qh.token field when starting a transfer to
eliminate a potential race. Place the qh.token in an available state
by default - that way only the qtd_next field needs to be updated to
start the transfer.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Paolo Bonzini [Wed, 16 Nov 2011 12:02:48 +0000 (13:02 +0100)]
usb-msc: move READ CAPACITY to usb_msc_init, fix off-by-one
Only leave the bootprio code in setup_drive_hd, like in setup_drive_cdrom.
This is a preparatory step; later, the SCSI code in usb_msc_init will
become entirely generic.
Also, the returned number of sectors is off by one. This will become
more important when CHS translation is added later.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 17 Nov 2011 09:23:00 +0000 (10:23 +0100)]
usb-uhci: fix race against host controller
While processing a frame, the host controller will write to the queue
head's element link field. The following sequence could then happen
when two consecutive sends occur to the same pipe.
controller SeaBIOS
---------------------------------------------------------------------
td->link = UHCI_PTR_TERM;
td->ctrl |= TD_CTRL_ACTIVE;
read TD from memory
wait_td(td);
td->ctrl &= ~TD_CTRL_ACTIVE;
write back td->ctrl
exit usb_send_bulk
restart usb_send_bulk
pipe->qh.element = &tds;
pipe->qh.element = td->link; ... go on and set up the first td ...
write back pipe->qh.element
td->ctrl |= TD_CTRL_ACTIVE;
Once the host controller has written UHCI_PTR_TERM to the element link,
subsequent tds would never be processed. This is surprisingly frequent
when the two consecutive sends are in the OUT direction (and just as
surprisingly, it seems like it never happens in the IN direction).
To fix this, at the end of the processing do not wait for each single
TD to become inactive, but for the host controller to invalidate the
element link (which implies it's done with all TDs).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 17 Nov 2011 09:22:59 +0000 (10:22 +0100)]
usb-uhci: reorganize wait_qh into wait_pipe
Four changes:
1) Add explicit GET_FLATPTR/SET_FLATPTR.
2) Pass the whole pipe to wait_qh so that we can get the iobase from there.
3) Clean up the pipe upon timeout, since that is the only sensible
thing to do: tds are on the stack, and leaving pointers to them in
the pipe is not a good idea.
4) Add a variable timeout argument, since bulk transfers might take more
than 500 ms.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 16 Nov 2011 12:02:42 +0000 (13:02 +0100)]
cdrom: use TEST UNIT READY to detect ready medium
The READ CAPACITY output is not used except for some debugging messages.
In the future, we will use this code for USB sticks too, but those
already send READ CAPACITY. To avoid code duplication, switch to TEST
UNIT READY for this task.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Kenji Kaneshige [Mon, 10 Oct 2011 06:06:29 +0000 (14:06 +0800)]
seabios: fix mptable nmi entry
In the current seabios MP table description, NMI is connected only to
BSP's LINT1. But usually NMI is connected to all the CPUs' LINT1 as
indicated in MP specification. This patch changes seabios MP table to
describe NMI is connected to all the CPUs' LINT1.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Reviewed-by: Lai Jiangshan <laijs@cn.fujitsu.com>
Add ACPI_EXTRACT_ALL_CODE directive, to support extracting
AML code from listing into a named array. Use that instead including C
file generated by iasl, this makes it possible to include multiple AML
tables without resorting to preprocessor tricks.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Kevin O'Connor [Sat, 15 Oct 2011 15:42:48 +0000 (11:42 -0400)]
Replace recursive pci init system with linear passes.
The existing PCI sizing and mapping uses a recursive algorithm to
visit every bus and its devices in order. Replace that with an
algorithm that visits every device and then every bus.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 15 Oct 2011 15:07:30 +0000 (11:07 -0400)]
Replace pciinit busses_count with MaxPCIBus.
Use the existing bus count instead of calculating a new one. Also,
the MaxPCIBus is guaranteed to encompass all pci->secondary_bus
references, so no need to check for overruns.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 1 Oct 2011 15:33:31 +0000 (11:33 -0400)]
Separate pciinit.c into clearly delineated sections.
There are four separate phases of the current PCI initialization code:
bus initialization, bus sizing, bar allocation, and misc device init.
Move the code exclusively called in each phase next to each other, and
clearly mark each section.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Use iasl -l flag to produce a mixed listing, where a
source line is followed by matching AML.
Add a tool tools/acpi_extract.py to process this
listing. The tool looks for ACPI_EXTRACT tags
in the ASL source and outputs matching AML offsets
in an array.
To make these directives pass through ASL without affecting AML,
and to make it possible to match AML to source exactly,
add a preprocessing stage, which prepares input for iasl,
and puts each ACPI_EXTRACT tag within a comment,
on a line by itself.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Kevin O'Connor [Thu, 22 Sep 2011 01:19:51 +0000 (21:19 -0400)]
Move code from PCI hotplug DSDT macros to methods.
Simplify the hotplug code by moving the bulk of the logic out of the
macros and into static method definitions. This also reduces the ACPI
DSDT code size.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 1 Oct 2011 16:35:32 +0000 (12:35 -0400)]
Fix alignment bug in pci_bios_init_root_regions().
If there are no memory allocations for a given type then the "max" bar
size is zero. However, ALIGN_DOWN does not handle an alignment of
zero properly. Catch and handle the zero case.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 1 Oct 2011 14:43:48 +0000 (10:43 -0400)]
Reorder build objects to work around gcc bug with -combine.
Some versions of gcc have difficulties with externally visible
variables that are used before they are declared. Now that pmm.c
contains only 32bit code and has a reference to CanPreempt, make sure
the declaration of CanPreempt (in stacks.c) is compiled first.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Tue, 20 Sep 2011 23:42:14 +0000 (19:42 -0400)]
Define handle_post as VISIBLE32FLAT as work around for QEmu memory layout.
QEmu only copies the top 128K of the BIOS image to low memory
(0xe0000-0xfffff). Images over 128K are only fully mapped in high
memory (0xfff00000). However, the SeaBIOS shadow functions
(make_bios_writable_intel) will copy up to 256K to low memory.
SeaBIOS generally works with 256K roms because they are automatically
copied to low memory during the BIOS init. However, this only works
if the shadow function code is itself part of the bios image that is
placed in low memory by QEmu.
Defining handle_post() as VISIBLE32FLAT will make the linker scripts
more likely to place the initial shadow code in the last 128K of the
image.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Jan Kiszka [Mon, 29 Aug 2011 15:50:10 +0000 (17:50 +0200)]
Probe HPET existence
QEMU does not provide a HPET block if it was configured with -no-hpet,
other machines SeaBIOS runs on may lack a HPET as well. Perform basic
checks the ID register for a reasonable vendor ID and a clock period
within the valid range, do not build the HPET table if that fails.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Kevin O'Connor [Sun, 28 Aug 2011 16:42:15 +0000 (12:42 -0400)]
Use coreboot smbios table if found.
The coreboot init code now looks for an existing smbios table and will
use it. A locally generated smbios table will only be created if no
coreboot table is found.
Gerd Hoffmann [Tue, 9 Aug 2011 15:22:42 +0000 (17:22 +0200)]
pci: re-add isa bridge setup
The switch to the two-pass pci initialization dropped the isa bridge
initialization by accident. That broke interrupts on FreeBSD 4.4 and
maybe also other older guests which don't use ACPI for IRQ routing
setup. Add the bits back in.
Gerd Hoffmann [Thu, 4 Aug 2011 18:42:16 +0000 (20:42 +0200)]
ahci: enable by default
Lack of real hardware testing was the main reason to turn it off by
default. The AHCI has been fixed to work on both qemu and real
hardware, so lets flip the switch now.
Gerd Hoffmann [Thu, 4 Aug 2011 17:36:31 +0000 (19:36 +0200)]
ahci: use malloc_tmp memory for probing ports
Also allocate the ahci port struct itself from tmp memory for probing,
then copy to fseg memory in case we detected some device. This way we
don't waste fseg memory for unused ports.
Gerd Hoffmann [Thu, 4 Aug 2011 17:36:30 +0000 (19:36 +0200)]
ahci: move device registration
Stick description and boot priority into the port struct, so it
holds everything needed to register the device, so we can do
the registration after ahci_port_init returned.
Kevin O'Connor [Thu, 4 Aug 2011 00:45:32 +0000 (20:45 -0400)]
Allow allocation of SMBIOS table in f-segment if it is small.
If the SMBIOS is small (less than 600 bytes) allow it to be allocated
in the f-segment. This works around a bug in JunOS - it crashes on
SMBIOS tables located in high memory.
Rework init workflow to match suggestions in the ahci specs better,
especially remove the shortcut which tries to detect drives without
enabling FIS receiving. This makes memory allocation a bit complicated
as we are using malloc_tmp() allocated memory now to probe the devices
so we can free it when no drive is present. In case we detect a drive
we have to free and realloc the memory with malloc_low() so it is
available after POST when the boot loader wants read stuff via int13.
Also use TSC to calculate timeout instead of delays and loop counts.
Scott Duplichan [Thu, 14 Jul 2011 14:24:02 +0000 (16:24 +0200)]
ahci: handle unaligned buffers.
This change allows unaligned buffers to be used for reads or writes
to non-atapi devices. Currently only MS-DOS boot is known to need
unaligned buffer support.
Signed-off-by: Scott Duplichan <scott@notabs.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Poll interrupt status register to figure when the device has updated the
status and possibly finished the request, continue polling until BSY is
clear as we might see multiple status updates per request.
Ian Campbell [Wed, 13 Jul 2011 10:46:40 +0000 (11:46 +0100)]
xen: actually setup hypercalls.
This was somehow dropped during the iterations of the original Xen patches.
It's actually harmless at the moment since there are no users of hypercalls but
patches are being written to support Xen PV block devices which need this.
It's not clear exactly how early this needs to be but I think it needs to be at
least before init_hw() (since that would detect disk devices).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
This patch adds a second device scan to the pci initialization, which
counts the memory bars of the various sizes and types. Then it
calculates the sizes and the packing of the prefetchable and
non-prefetchable pci memory windows and prints the results.
The patch doesn't actually map the devices to make debugging easier.
Kevin O'Connor [Mon, 11 Jul 2011 02:35:07 +0000 (22:35 -0400)]
Simplify POST entry code by moving reboot logic from post.c to resume.c.
Detect a resume/reboot by inspecting HaveRunPost instead of inspecting
the cmos reset code. Inspecting a global variable is both simpler and
safer.
Move the reboot logic from post.c to resume.c - this makes the code in
post.c simpler as it is now only called once on machine startup. This
also makes it easier to ensure all POST initialization code resides in
the relocatable "init" sections.
Also, rename _start() to handle_post() so that it is more in keeping
with the entry_xxx() and handle_xxx() function naming.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sun, 10 Jul 2011 19:41:55 +0000 (15:41 -0400)]
Minor fix - make sure not to call ohci/uhci_init from irq handler.
When CONFIG_THREAD_OPTIONROMS is enabled, accessing the PCI config
space from a thread could potentially race with an option rom. Make
sure the ohci/uhci_init() functions (which access PCI config space)
are never run while an optionrom could also be running.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor [Sat, 9 Jul 2011 17:16:24 +0000 (13:16 -0400)]
Extend tools/readserial.py to support serial port timing calibration.
Some serial ports have slightly different timing. These timing
variations result in less accurate boot time reporting. So, add a
calibration mechanism to the tool so that one can determine how much
time a specific machine's serial port uses.
Also, extend the main part of the tool to allow the user to specify
an exact timing parameter.
projects / seabios.git / log