Paolo Bonzini [Thu, 27 Sep 2012 11:25:45 +0000 (13:25 +0200)]
migration: use migrate_fd_close in migrate_fd_cleanup
migrate_fd_cleanup will usually close the file descriptor via
buffered_file_close's call to migrate_fd_close. However, in the case
of s->file == NULL it is "inlining" migrate_fd_close (almost: there is a
direct close() instead of using s->close(s)). To fix the inconsistency
and clean up the code, allow multiple calls to migrate_fd_close and use
the function in migrate_fd_cleanup.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 21 Sep 2012 10:04:03 +0000 (12:04 +0200)]
migration: unify stdio-based QEMUFile operations
Now that qemu_fseek does not exist anymore, there is no reason to do
an fseek before fread/fwrite when operating on an stdio file.
Thus, unify the get/put_buffer callbacks used by qemu_fopen
with those used for pipes.
Reviewed-by: Orit Wasserman <owasserm@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Anthony Liguori [Thu, 1 Nov 2012 16:13:59 +0000 (11:13 -0500)]
Merge remote-tracking branch 'stefanha/net' into staging
* stefanha/net:
e1000: pre-initialize RAH/RAL registers
net: Reject non-netdevs in qmp_netdev_del()
net: use "socket" model name for UDP sockets
e1000: drop check_rxov, always treat RX ring with RDH == RDT as empty
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Anthony Liguori [Thu, 1 Nov 2012 16:12:50 +0000 (11:12 -0500)]
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master: (28 commits)
update-linux-headers.sh: Handle new kernel uapi/ directories
target-i386: kvm_cpu_fill_host: use GET_SUPPORTED_CPUID
target-i386: cpu: make -cpu host/check/enforce code KVM-specific
target-i386: make cpu_x86_fill_host() void
Emulate qemu-kvms -no-kvm option
Issue warning when deprecated -tdf option is used
Issue warning when deprecated drive parameter boot=on|off is used
Use global properties to emulate -no-kvm-pit-reinjection
Issue warning when deprecated -no-kvm-pit is used
Use machine options to emulate -no-kvm-irqchip
cirrus_vga: allow configurable vram size
target-i386: Add missing kvm cpuid feature name
i386: cpu: add missing CPUID[EAX=7,ECX=0] flag names
i386: kvm: filter CPUID leaf 7 based on GET_SUPPORTED_CPUID, too
i386: kvm: reformat filter_features_for_kvm() code
i386: kvm: filter CPUID feature words earlier, on cpu.c
i386: kvm: mask cpuid_ext4_features bits earlier
i386: kvm: mask cpuid_kvm_features earlier
i386: kvm: x2apic is not supported without in-kernel irqchip
i386: kvm: set CPUID_EXT_TSC_DEADLINE_TIMER on kvm_arch_get_supported_cpuid()
...
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Peter Maydell [Fri, 26 Oct 2012 15:29:38 +0000 (16:29 +0100)]
arm_boot: Change initrd load address to "halfway through RAM"
To avoid continually having to bump the initrd load address
to account for larger kernel images, put the initrd halfway
through RAM. This allows large kernels on new boards with lots
of RAM to work OK, without breaking existing usecases for
boards with only 32MB of RAM.
Note that this change fixes in passing a bug where we were
passing an overly large max_size to load_image_targphys()
for the initrd, which meant that we wouldn't correctly refuse
to load an enormous initrd that didn't actually fit into RAM.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Igor Mitsyanko <i.mitsyanko@samsung.com> Tested-by: Cole Robinson <crobinso@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Thu, 1 Nov 2012 15:42:49 +0000 (16:42 +0100)]
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf:
pseries: Cleanup duplications of ics_valid_irq() code
pseries: Clean up inconsistent variable name in xics.c
target-ppc: Extend FPU state for newer POWER CPUs
target-ppc: Rework storage of VPA registration state
Revert "PPC: pseries: Remove hack for PIO window"
Aurelien Jarno [Thu, 1 Nov 2012 15:42:29 +0000 (16:42 +0100)]
Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm: (28 commits)
hw/sd.c: add SD card save/load support
vmstate: Add support for saving/loading bitmaps
hw/sd.c: Fix erase for high capacity cards
pflash_cfi01: Fix debug mode printfery
pflash_cfi0x: QOMified
pflash_cfi01: remove unused total_len field
pflash_cfi0x: remove unused base field
hw/versatile_i2c: Use LOG_GUEST_ERROR
hw/arm_l2x0: Use LOG_GUEST_ERROR
hw/arm_sysctl: Use LOG_GUEST_ERROR
hw/armv7m_nvic: Use LOG_GUEST_ERROR and LOG_UNIMP
hw/arm_timer: Use LOG_GUEST_ERROR and LOG_UNIMP
hw/arm_gic: Use LOG_GUEST_ERROR
hw/arm11mpcore: Use LOG_GUEST_ERROR rather than hw_error()
hw/pl190: Use LOG_UNIMP rather than hw_error()
hw/pl110: Use LOG_GUEST_ERROR rather than hw_error()
hw/pl080: Use LOG_GUEST_ERROR and LOG_UNIMP
hw/pl061: Use LOG_GUEST_ERROR
hw/pl050: Use LOG_GUEST_ERROR
hw/exynos4_boards: Don't prematurely explode QEMUMachineInitArgs
...
Gerd Hoffmann [Wed, 10 Oct 2012 11:29:43 +0000 (13:29 +0200)]
pixman/vnc: use pixman images in vnc.
The vnc code uses *three* DisplaySurfaces:
First is the surface of the actual QemuConsole, usually the guest
screen, but could also be a text console (monitor/serial reachable via
Ctrl-Alt-<nr> keys). This is left as-is.
Second is the current server's view of the screen content. The vnc code
uses this to figure which parts of the guest screen did _really_ change
to reduce the amount of updates sent to the vnc clients. It is also
used as data source when sending out the updates to the clients. This
surface gets replaced by a pixman image. The format changes too,
instead of using the guest screen format we'll use fixed 32bit rgb
framebuffer and convert the pixels on the fly when comparing and
updating the server framebuffer.
Third surface carries the format expected by the vnc client. That isn't
used to store image data. This surface is switched to PixelFormat and a
boolean for bigendian byte order.
Gerd Hoffmann [Wed, 10 Oct 2012 09:16:26 +0000 (11:16 +0200)]
console: don't set PixelFormat alpha fields for 32bpp
Currently it is inconstent, PixelFormat->amask is left unset whereas
abits and amax and ashift are filled. As an alpha channel doesn't make
sense for the vga framebuffer leave all alpha fields clear.
Surfaces are now allocated using pixman. DisplaySurface gets new
struct fields with pixman image and data. DisplayChangeListeners
can easily start using pixman now.
Add pixman submodule as fallback for old distros.
Picking version 0.18.4. This is shipped by rhel6
and also the minimum version needed by spice so this
should serve well as baseline.
Gerd Hoffmann [Tue, 9 Oct 2012 15:10:13 +0000 (17:10 +0200)]
vga: fix text mode updating
With both text (curses) and graphics (vnc/sdl/spice/...) display active
vga text mode emulation fails to update both correctly. Depending on
whenever vga_update_text() or vga_draw_text() happens to be called first
only the text display or only the graphics display will see display
resolution changes and full redraws.
Fix it by calling both text/gfx resize functions in both code paths and
keep track of full screen redraws needed in VGACommonState fields.
Gerd Hoffmann [Fri, 4 Jun 2010 09:51:31 +0000 (11:51 +0200)]
console: add unregister_displaychangelistener
Also change the way the gui_timer is initialized: each time a
displaychangelistener is registered or unregistered we'll check
whether we need a timer (due to dpy_refresh callback being present)
and if so setup a timer, otherwise zap it. This way the gui timer
works correctly with displaychangelisteners coming and going.
David Gibson [Mon, 29 Oct 2012 17:25:00 +0000 (17:25 +0000)]
pseries: Clean up inconsistent variable name in xics.c
Throughout xics.c 'nr' is used to refer to a global interrupt number, and
'server' is used to refer to an interrupt server number (i.e. CPU number).
Except in icp_set_mfrr(), where 'nr' is used as a server number. Fix this
confusing inconsistency.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 29 Oct 2012 17:24:59 +0000 (17:24 +0000)]
target-ppc: Extend FPU state for newer POWER CPUs
This patch adds some extra FPU state to CPUPPCState. Specifically,
fpscr is extended to a target_ulong bits, since some recent (64 bit)
CPUs now have more status bits than fit inside 32 bits. Also, we add
the 32 VSR registers present on CPUs with VSX (these extend the
standard FP regs, which together with the Altivec/VMX registers form a
64 x 128bit register file for VSX).
We don't actually support the instructions using these extra registers
in TCG yet, but we still need a place to store the state so we can
sync it with KVM and savevm/loadvm it. This patch updates the savevm
code to not fail on the extended state, but also does not actually
save it - that's a project for another patch.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
David Gibson [Mon, 29 Oct 2012 17:24:58 +0000 (17:24 +0000)]
target-ppc: Rework storage of VPA registration state
We change the storage of the VPA information to explicitly use fixed
size integer types which will make life easier for syncing this data with
KVM, which we will need in future.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
[agraf: fix commit message] Signed-off-by: Alexander Graf <agraf@suse.de>
Gabriel L. Somlo [Wed, 31 Oct 2012 18:15:39 +0000 (14:15 -0400)]
e1000: pre-initialize RAH/RAL registers
Some guest operating systems' drivers (Mac OS X in particular) fail to
properly initialize the Receive Address registers (probably expecting
them to be pre-initialized by an earlier component, such as a specific
proprietary BIOS). This patch pre-initializes the RA registers, allowing
OS X networking to function properly. Other guest operating systems are
not affected, and free to (re)initialize these registers during boot.
[According to the datasheet the Address Valid bits in the RA registers
are cleared on PCI or software reset. This patch adds the NIC's MAC
address and sets Address Valid on reset. So we diverge from real
hardware behavior here. -- Stefan]
Signed-off-by: Gabriel Somlo <somlo@cmu.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 24 Oct 2012 12:34:12 +0000 (14:34 +0200)]
net: Reject non-netdevs in qmp_netdev_del()
The netdev_del command crashes when given a -net device, because it
calls qemu_opts_del(NULL).
Check that this is a -netdev before attempting to delete it and the
QemuOpts.
Note the subtle change from qemu_find_opts_err("netdev", errp) to
qemu_find_opts_err("netdev", NULL). Since "netdev" is a built in
options group and we don't check for NULL return anyway, there's no use
in passing errp here.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Lei Li [Thu, 1 Nov 2012 09:39:55 +0000 (17:39 +0800)]
net: use "socket" model name for UDP sockets
Fix the problem that can not delete the udp socket.
It's caused by passing "udp" model to net_socket_udp_init,
but we do not have "udp" model in our model list.
Pass the right model "socket" to init function.
Aurelien Jarno [Tue, 9 Oct 2012 19:53:21 +0000 (21:53 +0200)]
target-mips: don't flush extra TLB on permissions upgrade
If the guest uses a TLBWI instruction for upgrading permissions, we
don't need to flush the extra TLBs. This improve boot time performance
by about 10%.
Aurelien Jarno [Tue, 9 Oct 2012 19:53:21 +0000 (21:53 +0200)]
target-mips: use deposit instead of hardcoded version
Use the deposit op instead of and hardcoded bit field insertion. It
allows the host to emit the corresponding instruction if available.
At the same time remove the (lsb > msb) test. The MIPS64R2 instruction
set manual says "Because of the instruction format, lsb can never be
greater than msb, so there is no UNPREDICATABLE case for this
instruction."
(Bug reported as LP:1071149.) Cc: Никита Канунников <n.kanunnikov@sbtcom.ru> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 9 Oct 2012 19:53:21 +0000 (21:53 +0200)]
target-mips: optimize ddiv/ddivu/div/divu with movcond
The result of a division by 0, or a division of INT_MIN by -1 in the
signed case, is unpredictable. Just replace 0 by 1 in that case so that
it doesn't trigger a floating point exception on the host.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 9 Oct 2012 19:53:21 +0000 (21:53 +0200)]
target-mips: don't use local temps for store conditional
Store conditional operations only need local temps in user mode. Fix
the code to use temp local only in user mode, this spares two memory
stores in system mode.
At the same time remove a wrong a wrong copied & pasted comment,
store operations don't have a register destination.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 9 Oct 2012 19:53:21 +0000 (21:53 +0200)]
target-mips: implement unaligned loads using TCG
Load/store from helpers should be avoided as they are quite
inefficient. Rewrite unaligned loads instructions using TCG and
aligned loads. The number of actual loads operations to implement
an unaligned load instruction is reduced from up to 8 to 1.
Note: As we can't rely on shift by 32 or 64 undefined behaviour,
the code loads already shift by one constants.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
load/store microMIPS helpers are reinventing the wheel. Call do_lw,
do_ll, do_sw and do_sl instead of using a macro calling the cpu_*
load/store functions.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 23 Oct 2012 08:12:00 +0000 (10:12 +0200)]
target-mips: use softfloat constants when possible
softfloat already has a few constants defined, use them instead of
redefining them in target-mips.
Rename FLOAT_SNAN32 and FLOAT_SNAN64 to FP_TO_INT32_OVERFLOW and
FP_TO_INT64_OVERFLOW as even if they have the same value, they are
technically different (and defined differently in the MIPS ISA).
Remove the unused constants.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 9 Oct 2012 19:53:20 +0000 (21:53 +0200)]
target-mips: fix FPU exceptions
For each FPU instruction that can trigger an FPU exception, to call
call update_fcr31() after.
Remove the manual NaN assignment in case of float to float operation, as
softfloat is already taking care of that. However for float to int
operation, the value has to be changed to the MIPS one. In the cvtpw_ps
case, the two registers have to be handled separately to guarantee
a correct final value in both registers.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Sun, 28 Oct 2012 17:08:27 +0000 (18:08 +0100)]
target-mips: keep softfloat exception set to 0 between instructions
Instead of clearing the softfloat exception flags before each floating
point instruction, reset them to 0 in update_fcr31() when an exception
is detected.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Aurelien Jarno [Tue, 9 Oct 2012 19:53:20 +0000 (21:53 +0200)]
target-mips: use the softfloat floatXX_muladd functions
Use the new softfloat floatXX_muladd() functions to implement the madd,
msub, nmadd and nmsub instructions. At the same time replace the name of
the helpers by the name of the instruction, as the only reason for the
previous names was to keep the macros simple.
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Jan Kiszka [Fri, 12 Oct 2012 07:52:49 +0000 (09:52 +0200)]
chardev: Use timer instead of bottom-half to postpone open event
As the block layer may decide to flush bottom-halfs while the machine is
still initializing (e.g. to read geometry data from the disk), our
postponed open event may be processed before the last frontend
registered with a muxed chardev.
Until the semantics of BHs have been clarified, use an expired timer to
achieve the same effect (suggested by Paolo Bonzini). This requires to
perform the alarm timer initialization earlier as otherwise timer
subsystem can be used before being ready.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Aurelien Jarno [Wed, 31 Oct 2012 21:14:46 +0000 (22:14 +0100)]
target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
All switch() decoding instruction have a default entry, so it is possible
to have unused enum entries. Remove conditional definitions of MIPS64
opcode enums, as it only makes the code less readable.
Paolo Bonzini [Fri, 26 Oct 2012 09:43:58 +0000 (11:43 +0200)]
raw-win32: implement native asynchronous I/O
With the new support for EventNotifiers in the AIO event loop, we
can hook a completion port to every opened file and use asynchronous
I/O on them.
Wine's support is extremely inefficient, also because it really does
the I/O synchronously on regular files. (!) But it works, and it is
good to keep the Win32 and POSIX ports as similar as possible.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 31 Oct 2012 09:09:11 +0000 (10:09 +0100)]
threadpool: do not take lock in event_notifier_ready
The ordering is:
worker thread consumer thread
-------------------------------------------------------------------
write ret event_notifier_test_and_clear
wmb() read state
write state rmb()
event_notifier_set read ret
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 23 Feb 2012 12:23:34 +0000 (13:23 +0100)]
aio: add generic thread-pool facility
Add a generic thread-pool. The code is roughly based on posix-aio-compat.c,
with some changes, especially the following:
- use QemuSemaphore instead of QemuCond;
- separate the state of the thread from the return code of the worker
function. The return code is totally opaque for the thread pool;
- do not busy wait when doing cancellation.
A more generic threadpool (but still specific to I/O so that in the future
it can use special scheduling classes or PI mutexes) can have many uses:
it allows more flexibility in raw-posix.c and can more easily be extended
to Win32, and it will also be used to do an msync of the persistent bitmap.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 8 Aug 2011 12:36:41 +0000 (14:36 +0200)]
qemu-thread: add QemuSemaphore
The new thread pool will use semaphores instead of condition
variables, because QemuCond does not have qemu_cond_timedwait.
(I also like it more this way).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Andreas Färber [Thu, 3 May 2012 04:43:49 +0000 (06:43 +0200)]
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>
[AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
projects / qemu-xen.git / log