From: Jamin Lin <jamin_lin@aspeedtech.com>
Date: Thu, 4 Jul 2024 08:29:19 +0000 (+0800)
Subject: aspeed/soc: set dma64 property for AST2700 ftgmac100
X-Git-Tag: qemu-xen-4.20.0~81^2~3
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=f2146bc6cb98e3e6d5749a6a974a53a1a1a754fc;p=qemu-xen.git

aspeed/soc: set dma64 property for AST2700 ftgmac100

ASPEED AST2700 SOC is a 64 bits quad core CPUs (Cortex-a35)
And the base address of dram is "0x4 00000000" which
is 64bits address.

Set dma64 property for ftgmac100 model to support
64bits dram address DMA.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---

diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 18e6a8b10c..a9fb0d4b88 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -552,9 +552,12 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
         return;
     }
 
+    /* Net */
     for (i = 0; i < sc->macs_num; i++) {
         object_property_set_bool(OBJECT(&s->ftgmac100[i]), "aspeed", true,
                                  &error_abort);
+        object_property_set_bool(OBJECT(&s->ftgmac100[i]), "dma64", true,
+                                 &error_abort);
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->ftgmac100[i]), errp)) {
             return;
         }