From: Wei Liu Date: Thu, 2 Mar 2017 08:42:31 +0000 (+0000) Subject: x86: add UMIP feature bit X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=f02259db8c737220b4e6ae5564a8f6da4fba2949;p=people%2Fandrewcoop%2Fxen-test-framework.git x86: add UMIP feature bit Signed-off-by: Wei Liu Reviewed-by: Andrew Cooper --- diff --git a/include/arch/x86/processor.h b/include/arch/x86/processor.h index 0106954..e2a2cbb 100644 --- a/include/arch/x86/processor.h +++ b/include/arch/x86/processor.h @@ -52,6 +52,7 @@ #define X86_CR4_PCE 0x00000100 /* Performance counters at ipl 3 */ #define X86_CR4_OSFXSR 0x00000200 /* Fast FPU save and restore */ #define X86_CR4_OSXMMEXCPT 0x00000400 /* Unmasked SSE exceptions */ +#define X86_CR4_UMIP 0x00000800 /* UMIP */ #define X86_CR4_VMXE 0x00002000 /* VMX */ #define X86_CR4_SMXE 0x00004000 /* SMX */ #define X86_CR4_FSGSBASE 0x00010000 /* {rd,wr}{fs,gs}base */ diff --git a/include/xen/arch-x86/cpufeatureset.h b/include/xen/arch-x86/cpufeatureset.h index 905e8e8..f66a4ab 100644 --- a/include/xen/arch-x86/cpufeatureset.h +++ b/include/xen/arch-x86/cpufeatureset.h @@ -144,6 +144,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0.ecx, word 6 */ #define X86_FEATURE_PREFETCHWT1 (6*32+ 0) /* PREFETCHWT1 instruction */ +#define X86_FEATURE_UMIP (6*32+ 2) /* User-Mode Instruction Prevention */ #define X86_FEATURE_PKU (6*32+ 3) /* Protection Keys for Userspace */ #define X86_FEATURE_OSPKE (6*32+ 4) /* OS Protection Keys Enable */