From: Peter Maydell <peter.maydell@linaro.org>
Date: Thu, 19 Nov 2020 21:55:55 +0000 (+0000)
Subject: target/arm: Enforce M-profile VMRS/VMSR register restrictions
X-Git-Tag: qemu-xen-4.16.0-rc4~444^2~19
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=ede97c9d71110821738a48f88ff9f10d6bec017f;p=qemu-xen.git

target/arm: Enforce M-profile VMRS/VMSR register restrictions

For M-profile before v8.1M, the only valid register for VMSR/VMRS is
the FPSCR.  We have a comment that states this, but the actual logic
to forbid accesses for any other register value is missing, so we
would end up with A-profile style behaviour.  Add the missing check.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-7-peter.maydell@linaro.org
---

diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index 2a67ed0f6e..e100182a32 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -622,7 +622,10 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
          * Accesses to R15 are UNPREDICTABLE; we choose to undef.
          * (FPSCR -> r15 is a special case which writes to the PSR flags.)
          */
-        if (a->rt == 15 && (!a->l || a->reg != ARM_VFP_FPSCR)) {
+        if (a->reg != ARM_VFP_FPSCR) {
+            return false;
+        }
+        if (a->rt == 15 && !a->l) {
             return false;
         }
     }