From: Richard Henderson Date: Mon, 30 May 2022 16:22:24 +0000 (-0700) Subject: Merge tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu... X-Git-Tag: pull-xen-20220609~13 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=ed72f34421f8900d9fedef4a37722522cf0bf3e7;p=people%2Faperard%2Fqemu-dm.git Merge tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * docs/system/arm: Add FEAT_HCX to list of emulated features * target/arm/hvf: Include missing "cpregs.h" * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready * SVE: refactor to use TRANS/TRANS_FEAT macros and push SVE feature check down to individual insn level # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmKU620ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lYDEACf8Mt9eYMTNgccjuqrkw+c # Za1gTcYlz8Jt90dYjAghQVFSnYWTbqdn10+GzadUYRBfl7Py7Jh531RsfOJlXEng # 0xzJ9Wjl631SIiCOXwp2mx8WaSkFt4QmII/ooBMjmCrudM+OQWKcbwArvcjTxoL/ # 8DrIE/edyxntFN8Owy6kgFNLo/spAac47rOCHUNtWTWA4TDtmo0TU6boN+J1WjCO # wz1svl/JIS+6iPqx7B50Bm3h7Yb9NF2NbkUJ0AJEaNJovN7ZbPhobVLU8LbcsfK1 # iNAt4s1UVPH+FFTy1oiBu8d5D3sLDAOff7DmLQ6iKWBpevuEvm3VRbOrHIxLTtEL # ozc9BEBcNuKsKC6bdeAs2WhOWMjyzNdoaJTKUNJrjjJ//yd/sUXM9qi92BpeSo/8 # LXsUtUje2/JY8y7cgUe2u1oyIo/2DkT/FkMSCr2rVpcHXdWe/8wNPlnzu+UZoWnZ # 5neLqJrqU8gZemje0ZiSJd6+pl2lO+iM/VGJos/NDLK44SJJDj0GkcmzL7eX6eXm # Gs0qWM1uDcVxKaCiLVHfKsbVC5x8NHSFeWtmY/EqppggtvgF3vSz7EviKpcAu5dQ # xp7Jqa9p64QE+snHarTCntH9U1L6ioicPPtK7EO3idbvwJ+g0qhYQPZPh37PO8DW # uSa9a3btDupJFzIgKorSrA== # =MU42 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 30 May 2022 09:06:05 AM PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] * tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm: (117 commits) target/arm: Remove aa64_sve check from before disas_sve target/arm: Add sve feature check for remaining trans_* functions target/arm: Use TRANS_FEAT for do_FMLAL_zzxw target/arm: Use TRANS_FEAT for do_FMLAL_zzzw target/arm: Use TRANS_FEAT for do_shr_narrow target/arm: Use TRANS_FEAT for do_shll_tb target/arm: Use TRANS_FEAT for do_narrow_extract target/arm: Use TRANS_FEAT for FCMLA_zzxz target/arm: Remove assert in trans_FCMLA_zzxz target/arm: Use TRANS_FEAT for DO_FPCMP target/arm: Use TRANS_FEAT for DO_FP_IMM target/arm: Move null function and sve check into do_fp_imm target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp target/arm: Introduce gen_gvec_fpst_zzzzp target/arm: Use TRANS_FEAT for FCADD target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz target/arm: Use TRANS_FEAT for do_ppz_fp target/arm: Use TRANS_FEAT for FLOGB target/arm: Use TRANS_FEAT for do_frint_mode ... Signed-off-by: Richard Henderson --- ed72f34421f8900d9fedef4a37722522cf0bf3e7