From: Peter Maydell Date: Fri, 1 Apr 2022 16:16:47 +0000 (+0100) Subject: Merge tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydell/qemu... X-Git-Tag: qemu-xen-4.17.0-rc4~14 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=ea72ac9bc8fcb90405768412ebb9ff01d3b1a2bb;p=qemu-xen.git Merge tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * target/arm: Fix some bugs in secure EL2 handling * target/arm: Fix assert when !HAVE_CMPXCHG128 * MAINTAINERS: change Fred Konrad's email address # gpg: Signature made Fri 01 Apr 2022 15:59:59 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell " [ultimate] # gpg: aka "Peter Maydell " [ultimate] # gpg: aka "Peter Maydell " [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20220401' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Don't use DISAS_NORETURN in STXP !HAVE_CMPXCHG128 codegen MAINTAINERS: change Fred Konrad's email address target/arm: Determine final stage 2 output PA space based on original IPA target/arm: Take VSTCR.SW, VTCR.NSW into account in final stage 2 walk target/arm: Check VSTCR.SW when assigning the stage 2 output PA space target/arm: Fix MTE access checks for disabled SEL2 Signed-off-by: Peter Maydell --- ea72ac9bc8fcb90405768412ebb9ff01d3b1a2bb