From: Jan Beulich Date: Wed, 29 Aug 2018 14:30:54 +0000 (+0200) Subject: x86/alternatives: fully leverage automatic NOP filling X-Git-Tag: 4.12.0-rc1~728 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d6fcc5869790b9e07dc2587e50045a83a67f86fa;p=people%2Fdwmw2%2Fxen.git x86/alternatives: fully leverage automatic NOP filling As of commit 4008c71d7a ("x86/alt: Support for automatic padding calculations") there's no point having explict ASM_NOPn instances in alternatives anymore - drop them. As a result also drop the asm/nops.h inclusion from alternative.h, adding explicit inclusions in the two remaining C files needing them. While touching it also move the CR4_PV32_RESTORE definition out of the SMAP-specific conditional into a more general one. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 1ae49239d8..aec4d8db91 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #define MAX_PATCH_LEN (255-1) diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c index 8f04fc08d5..7d79d9048d 100644 --- a/xen/arch/x86/flushtlb.c +++ b/xen/arch/x86/flushtlb.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -208,7 +209,7 @@ unsigned int flush_area_local(const void *va, unsigned int flags) c->x86_clflush_size && c->x86_cache_size && sz && ((sz >> 10) < c->x86_cache_size) ) { - alternative(ASM_NOP3, "sfence", X86_FEATURE_CLFLUSHOPT); + alternative("", "sfence", X86_FEATURE_CLFLUSHOPT); for ( i = 0; i < sz; i += c->x86_clflush_size ) alternative_input(".byte " __stringify(NOP_DS_PREFIX) ";" " clflush %0", diff --git a/xen/include/asm-x86/asm_defns.h b/xen/include/asm-x86/asm_defns.h index fad5ca5787..e0096834e6 100644 --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -193,30 +193,19 @@ void ret_from_intr(void); #define __ASM_STAC .byte 0x0f,0x01,0xcb #ifdef __ASSEMBLY__ -#define ASM_STAC \ - ALTERNATIVE __stringify(ASM_NOP3), \ - __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP - -#define ASM_CLAC \ - ALTERNATIVE __stringify(ASM_NOP3), \ - __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP - -#define CR4_PV32_RESTORE \ - ALTERNATIVE_2 __stringify(ASM_NOP5), \ - "call cr4_pv32_restore", X86_FEATURE_XEN_SMEP, \ - "call cr4_pv32_restore", X86_FEATURE_XEN_SMAP - +#define ASM_STAC ALTERNATIVE "", __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP +#define ASM_CLAC ALTERNATIVE "", __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP #else static always_inline void clac(void) { /* Note: a barrier is implicit in alternative() */ - alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP); + alternative("", __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP); } static always_inline void stac(void) { /* Note: a barrier is implicit in alternative() */ - alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP); + alternative("", __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP); } #endif @@ -325,6 +314,11 @@ static always_inline void stac(void) subq $-(UREGS_error_code-UREGS_r15+\adj), %rsp .endm +#define CR4_PV32_RESTORE \ + ALTERNATIVE_2 "", \ + "call cr4_pv32_restore", X86_FEATURE_XEN_SMEP, \ + "call cr4_pv32_restore", X86_FEATURE_XEN_SMAP + #endif #ifdef CONFIG_PERF_COUNTERS diff --git a/xen/include/asm-x86/spec_ctrl.h b/xen/include/asm-x86/spec_ctrl.h index 8f8aad40bb..e7d946ecb6 100644 --- a/xen/include/asm-x86/spec_ctrl.h +++ b/xen/include/asm-x86/spec_ctrl.h @@ -72,7 +72,7 @@ static always_inline void spec_ctrl_enter_idle(struct cpu_info *info) barrier(); info->spec_ctrl_flags |= SCF_use_shadow; barrier(); - asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE) + asm volatile ( ALTERNATIVE("", "wrmsr", X86_FEATURE_SC_MSR_IDLE) :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0) : "memory" ); } @@ -87,7 +87,7 @@ static always_inline void spec_ctrl_exit_idle(struct cpu_info *info) */ info->spec_ctrl_flags &= ~SCF_use_shadow; barrier(); - asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", X86_FEATURE_SC_MSR_IDLE) + asm volatile ( ALTERNATIVE("", "wrmsr", X86_FEATURE_SC_MSR_IDLE) :: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0) : "memory" ); }