From: Anton Blanchard <anton@samba.org>
Date: Tue, 25 Mar 2014 02:40:26 +0000 (+1100)
Subject: target-ppc: POWER8 supports the MSR_LE bit
X-Git-Tag: qemu-xen-4.5.0-rc1~71^2~3
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d6fb330f70831180c69899a4f8ba1a7a5fdce45c;p=qemu-upstream-4.5-testing.git

target-ppc: POWER8 supports the MSR_LE bit

Add MSR_LE to the msr_mask for POWER8.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 7f53c33ea..a82c8f950 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7175,7 +7175,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                         PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
                         PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
                         PPC2_ISA205 | PPC2_ISA207S;
-    pcc->msr_mask = 0x800000000284FF36ULL;
+    pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;