From: Peter Maydell Date: Mon, 17 Mar 2014 16:31:46 +0000 (+0000) Subject: target-arm: Add ARM_CP_IO notation to PMCR reginfo X-Git-Tag: qemu-xen-4.5.0-rc1~98^2~25 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d6d60581f3f6778de85ee23427006151b5226667;p=qemu-upstream-4.5-testing.git target-arm: Add ARM_CP_IO notation to PMCR reginfo Now that the PMCR writefn makes timer accesses, its reginfo needs the ARM_CP_IO flag, so that icount mode works correctly. (Fixes the bug accidentally introduced in commit 7c2cb42b). Reported-by: Laurent Desnogues Signed-off-by: Peter Maydell Message-id: 1394908291-16546-1-git-send-email-peter.maydell@linaro.org --- diff --git a/target-arm/helper.c b/target-arm/helper.c index f0a1fd48e..5080372ba 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1983,6 +1983,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) ARMCPRegInfo pmcr = { .name = "PMCR", .cp = 15, .crn = 9, .crm = 12, .opc1 = 0, .opc2 = 0, .access = PL0_RW, .resetvalue = cpu->midr & 0xff000000, + .type = ARM_CP_IO, .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcr), .accessfn = pmreg_access, .writefn = pmcr_write, .raw_writefn = raw_write,