From: Roger Pau Monne Date: Tue, 13 Oct 2015 16:27:20 +0000 (+0200) Subject: libxc: create an initial FPU state for HVM guests X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d64dbbcc7c9934a46126c59d78536235908377ad;p=people%2Fjulieng%2Fxen-unstable.git libxc: create an initial FPU state for HVM guests Xen always set the FPU as initialized when loading a HVM context, so libxc has to provide a valid FPU context when setting the CPU registers. This is a stop-gap measure in order to unblock OSSTest Windows 7 failures while a proper fix for the HVM CPU save/restore is being worked on. Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper Suggested-by: Jan Beulich Cc: Jan Beulich Cc: Andrew Cooper Cc: Ian Jackson Cc: Stefano Stabellini Cc: Ian Campbell Cc: Wei Liu Acked-by: Wei Liu Acked-by: Ian Campbell --- diff --git a/tools/libxc/xc_dom_x86.c b/tools/libxc/xc_dom_x86.c index dd331bf71e..034abe0875 100644 --- a/tools/libxc/xc_dom_x86.c +++ b/tools/libxc/xc_dom_x86.c @@ -841,6 +841,27 @@ static int vcpu_hvm(struct xc_dom_image *dom) struct hvm_save_descriptor end_d; HVM_SAVE_TYPE(END) end; } bsp_ctx; + /* + * The layout of the fpu context structure is the same for + * both 32 and 64 bits. + */ + struct { + uint16_t fcw; + uint16_t fsw; + uint8_t ftw; + uint8_t rsvd1; + uint16_t fop; + union { + uint64_t addr; + struct { + uint32_t offs; + uint16_t sel; + uint16_t rsvd; + }; + } fip, fdp; + uint32_t mxcsr; + uint32_t mxcsr_mask; + } *fpu_ctxt; uint8_t *full_ctx = NULL; int rc; @@ -908,6 +929,23 @@ static int vcpu_hvm(struct xc_dom_image *dom) /* Set the control registers. */ bsp_ctx.cpu.cr0 = X86_CR0_PE | X86_CR0_ET; + /* + * XXX: Set initial FPU state. + * + * This should be removed once Xen is able to know if the + * FPU state saved is valid or not, now Xen always sets + * fpu_initialised to true regardless of the FPU state. + * + * The code below mimics the FPU sate after executing + * fninit + * ldmxcsr 0x1f80 + */ + fpu_ctxt = (typeof(fpu_ctxt))bsp_ctx.cpu.fpu_regs; + + fpu_ctxt->fcw = 0x37f; + fpu_ctxt->ftw = 0xff; + fpu_ctxt->mxcsr = 0x1f80; + /* Set the IP. */ bsp_ctx.cpu.rip = dom->parms.phys_entry;