From: Mark Cave-Ayland Date: Sat, 5 Mar 2022 15:09:54 +0000 (+0000) Subject: mos6522: record last_irq_levels in mos6522_set_irq() X-Git-Tag: qemu-xen-4.17.0-rc4~55^2~13 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d4454e41d74b85c92fbca06a30622a18545aad81;p=qemu-xen.git mos6522: record last_irq_levels in mos6522_set_irq() To detect edge-triggered IRQs it is necessary to store the last state of each IRQ in a last_irq_levels bitmap. Note: this is a migration break for machines which use mos6522 instances which are g3beige/mac99 (PPC) and q800 (m68k). Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20220305150957.5053-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index 2c20decca1..c67123f864 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -72,6 +72,12 @@ static void mos6522_set_irq(void *opaque, int n, int level) } mos6522_update_irq(s); + + if (level) { + s->last_irq_levels |= 1 << n; + } else { + s->last_irq_levels &= ~(1 << n); + } } static uint64_t get_counter_value(MOS6522State *s, MOS6522Timer *ti) @@ -544,8 +550,8 @@ static const VMStateDescription vmstate_mos6522_timer = { const VMStateDescription vmstate_mos6522 = { .name = "mos6522", - .version_id = 0, - .minimum_version_id = 0, + .version_id = 1, + .minimum_version_id = 1, .fields = (VMStateField[]) { VMSTATE_UINT8(a, MOS6522State), VMSTATE_UINT8(b, MOS6522State), @@ -556,6 +562,7 @@ const VMStateDescription vmstate_mos6522 = { VMSTATE_UINT8(pcr, MOS6522State), VMSTATE_UINT8(ifr, MOS6522State), VMSTATE_UINT8(ier, MOS6522State), + VMSTATE_UINT8(last_irq_levels, MOS6522State), VMSTATE_STRUCT_ARRAY(timers, MOS6522State, 2, 0, vmstate_mos6522_timer, MOS6522Timer), VMSTATE_END_OF_LIST() diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h index 193a3dc870..babea99e06 100644 --- a/include/hw/misc/mos6522.h +++ b/include/hw/misc/mos6522.h @@ -133,6 +133,7 @@ struct MOS6522State { uint64_t frequency; qemu_irq irq; + uint8_t last_irq_levels; }; #define TYPE_MOS6522 "mos6522"