From: Peter Maydell Date: Thu, 8 Nov 2018 18:37:29 +0000 (+0000) Subject: Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-rc1' into staging X-Git-Tag: qemu-xen-4.13.0-rc1~565 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=d3c2bbb166f8cd840a3f4efec31d55485f1360ed;p=qemu-xen.git Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-rc1' into staging A Single RISC-V Patch for 3.1-rc1 This tag contains a single patch that I'd like to target for rc1: a fix for a memory leak that was detected by static code analysis. There are still three patch sets that I'd like to try to get up for 3.1: * The patch set Basian just published that contains fixes for a pair of issues he found when converting our port to decodetree. * An as-of-yet-unwritten fix to the third issue that Basian pointed out. * A fix to our fflags bug, which is currently coupled to some CSR refactoring that I don't think is OK for 3.1. I'm at Plumbers next week (and I think Alistair is there too?), but I'll try to find a way to squeeze in as much as possible. # gpg: Signature made Thu 08 Nov 2018 16:50:27 GMT # gpg: using RSA key EF4CA1502CCBAB41 # gpg: Good signature from "Palmer Dabbelt " # gpg: aka "Palmer Dabbelt " # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/riscv/tags/riscv-for-master-3.1-rc1: riscv: spike: Fix memory leak in the board init Signed-off-by: Peter Maydell --- d3c2bbb166f8cd840a3f4efec31d55485f1360ed