From: Inès Varhol Date: Thu, 23 May 2024 15:06:20 +0000 (+0100) Subject: hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size X-Git-Tag: qemu-xen-4.20.0~133^2~38 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=cd2a2788a92c39aa6405e2ff7a95aca02d036757;p=qemu-xen.git hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size Signed-off-by: Arnaud Minier Signed-off-by: Inès Varhol Message-id: 20240505141613.387508-1-ines.varhol@telecom-paris.fr Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c index 02f666308c..fc5dcac0c4 100644 --- a/hw/char/stm32l4x5_usart.c +++ b/hw/char/stm32l4x5_usart.c @@ -56,7 +56,7 @@ REG32(CR1, 0x00) FIELD(CR1, UE, 0, 1) /* USART enable */ REG32(CR2, 0x04) FIELD(CR2, ADD_1, 28, 4) /* ADD[7:4] */ - FIELD(CR2, ADD_0, 24, 1) /* ADD[3:0] */ + FIELD(CR2, ADD_0, 24, 4) /* ADD[3:0] */ FIELD(CR2, RTOEN, 23, 1) /* Receiver timeout enable */ FIELD(CR2, ABRMOD, 21, 2) /* Auto baud rate mode */ FIELD(CR2, ABREN, 20, 1) /* Auto baud rate enable */