From: Keir Fraser <keir.fraser@citrix.com>
Date: Mon, 15 Sep 2008 14:44:38 +0000 (+0100)
Subject: x86: Fix 32-bit build after AMD microcode update patch.
X-Git-Tag: 3.4.0-rc1~218^2~4
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=c694aed7c42e6f46de4afabdbe2c19734918d531;p=people%2Fpauldu%2Fxen.git

x86: Fix 32-bit build after AMD microcode update patch.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
---

diff --git a/xen/arch/x86/microcode_amd.c b/xen/arch/x86/microcode_amd.c
index d2198d5838..add5b78600 100644
--- a/xen/arch/x86/microcode_amd.c
+++ b/xen/arch/x86/microcode_amd.c
@@ -170,11 +170,10 @@ out:
 static int apply_microcode_amd(int cpu)
 {
 	unsigned long flags;
-	unsigned int eax, edx;
-	unsigned int rev;
+	uint32_t eax, edx, rev;
 	int cpu_num = raw_smp_processor_id();
 	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
-	unsigned long addr;
+	uint64_t addr;
 
 	/* We should bind the task to the CPU */
 	BUG_ON(cpu_num != cpu);
@@ -185,8 +184,8 @@ static int apply_microcode_amd(int cpu)
 	spin_lock_irqsave(&microcode_update_lock, flags);
 
 	addr = (unsigned long)&uci->mc.mc_amd->hdr.data_code;
-	edx = (unsigned int)((unsigned long)(addr >> 32));
-	eax = (unsigned int)((unsigned long)(addr & 0xffffffff));
+	edx = (uint32_t)(addr >> 32);
+	eax = (uint32_t)addr;
 
 	asm volatile("movl %0, %%ecx; wrmsr" :
 		     : "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx");