From: Avi Kivity Date: Tue, 26 Jul 2011 11:26:15 +0000 (+0300) Subject: ioport: register ranges by byte aligned addresses always X-Git-Tag: qemu-xen-4.3.0-rc1~2628^2~80 X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=bf3fb0e12aeb9fea08383c145f874ed7acc29e31;p=qemu-upstream-4.5-testing.git ioport: register ranges by byte aligned addresses always The I/O port space is byte addressable, even for word and long accesses. An example is the VMware svga card, which has long ports on offsets 0, 1, and 2. Reviewed-by: Anthony Liguori Signed-off-by: Avi Kivity Signed-off-by: Anthony Liguori --- diff --git a/ioport.c b/ioport.c index 0d2611d14..a32483ba8 100644 --- a/ioport.c +++ b/ioport.c @@ -146,7 +146,7 @@ int register_ioport_read(pio_addr_t start, int length, int size, hw_error("register_ioport_read: invalid size"); return -1; } - for(i = start; i < start + length; i += size) { + for(i = start; i < start + length; ++i) { ioport_read_table[bsize][i] = func; if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque) hw_error("register_ioport_read: invalid opaque for address 0x%x", @@ -166,7 +166,7 @@ int register_ioport_write(pio_addr_t start, int length, int size, hw_error("register_ioport_write: invalid size"); return -1; } - for(i = start; i < start + length; i += size) { + for(i = start; i < start + length; ++i) { ioport_write_table[bsize][i] = func; if (ioport_opaque[i] != NULL && ioport_opaque[i] != opaque) hw_error("register_ioport_write: invalid opaque for address 0x%x",