From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Wed, 17 Oct 2018 21:56:52 +0000 (-0700)
Subject: drm/i915/icl: Fix signal_levels
X-Git-Tag: v5.4.17~4909^2^2~1
X-Git-Url: http://xenbits.xensource.com/gitweb?a=commitdiff_plain;h=b4ec5f39e4a0bc9844634faa88dd08ca94dca39d;p=arm%2Flinux.git

drm/i915/icl: Fix signal_levels

Since when it was introduced we forgot to add
this case so ICL was using a wrong signal_levels
as reference.

Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181017215652.26841-1-rodrigo.vivi@intel.com
(cherry picked from commit 61cdfb9e194d2a327eef301e8fc80b63e3e1dc7a)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 06e91d7b6d8e..3fae4dab295f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3734,7 +3734,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
 	uint32_t signal_levels, mask = 0;
 	uint8_t train_set = intel_dp->train_set[0];
 
-	if (IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) {
+	if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10) {
 		signal_levels = bxt_signal_levels(intel_dp);
 	} else if (HAS_DDI(dev_priv)) {
 		signal_levels = ddi_signal_levels(intel_dp);